| Index: emcore/trunk/target/ipodclassic/target.h |
| — | — | @@ -95,6 +95,7 @@ |
| 96 | 96 | #define SECTOR_SIZE 4096
|
| 97 | 97 |
|
| 98 | 98 | #define HAVE_TARGETINIT_LATE
|
| | 99 | +#define HAVE_TARGETINIT_EXECFIRMWARE
|
| 99 | 100 |
|
| 100 | 101 | #define HAVE_RTC
|
| 101 | 102 |
|
| Index: emcore/trunk/target/ipodnano3g/targetinit.c |
| — | — | @@ -22,10 +22,89 @@ |
| 23 | 23 |
|
| 24 | 24 |
|
| 25 | 25 | #include "global.h"
|
| | 26 | +#include "bootflash.h"
|
| 26 | 27 | #include "clickwheel.h"
|
| | 28 | +#include "clockgates.h"
|
| | 29 | +#include "s5l8702.h"
|
| 27 | 30 |
|
| 28 | 31 |
|
| | 32 | +#define sysi ((uint8_t*)0x2203fdf8)
|
| | 33 | +#define sysiword ((uint32_t*)0x2203fdf8)
|
| | 34 | +
|
| | 35 | +
|
| 29 | 36 | void targetinit_late()
|
| 30 | 37 | {
|
| | 38 | + int i;
|
| | 39 | +
|
| 31 | 40 | clickwheel_init();
|
| | 41 | +
|
| | 42 | + uint8_t* nor = (uint8_t*)memalign(0x10, 0x1000);
|
| | 43 | + uint32_t* norword = (uint32_t*)nor;
|
| | 44 | + if (!nor) return;
|
| | 45 | + bootflash_readraw(nor, 0, 0x1000);
|
| | 46 | + uint32_t scfg_size = norword[1];
|
| | 47 | + uint32_t scfg_entrycount = norword[5];
|
| | 48 | + if (norword[0] == 0x53436667 && scfg_size <= 0x1000
|
| | 49 | + && scfg_entrycount * 0x14 + 0x18 == scfg_size)
|
| | 50 | + {
|
| | 51 | + memset(sysi, 0, 0x128);
|
| | 52 | + sysiword[0] = 0x53797349;
|
| | 53 | + sysiword[1] = 4;
|
| | 54 | + sysiword[0x22] = 0x414e;
|
| | 55 | + sysiword[0x38] = 0x4000000;
|
| | 56 | + sysiword[0x39] = 0x8000000;
|
| | 57 | + sysiword[0x3a] = 0x40000;
|
| | 58 | + sysiword[0x3b] = 0x22000000;
|
| | 59 | + sysiword[0x3c] = 0x100000;
|
| | 60 | + sysiword[0x3d] = 0x24000000;
|
| | 61 | + sysiword[0x46] = 0x7672736e;
|
| | 62 | + sysiword[0x47] = 0x1308004;
|
| | 63 | + sysiword[0x48] = 0x53797349;
|
| | 64 | + sysiword[0x49] = 0x2203fdf8;
|
| | 65 | + for (i = 0; i < scfg_entrycount; i++)
|
| | 66 | + switch (norword[6 + i * 5])
|
| | 67 | + {
|
| | 68 | + case 0x53724e6d: // SrNm
|
| | 69 | + memcpy(&sysi[0x18], &norword[6 + i * 5 + 1], 16);
|
| | 70 | + break;
|
| | 71 | + case 0x46774964: // FwId
|
| | 72 | + memcpy(&sysi[0x38], &norword[6 + i * 5 + 2], 8);
|
| | 73 | + break;
|
| | 74 | + case 0x48775672: // HwVr
|
| | 75 | + sysiword[0x21] = norword[6 + i * 5 + 2];
|
| | 76 | + break;
|
| | 77 | + case 0x5265676e: // Regn
|
| | 78 | + if (nor[24 + i * 0x14 + 4] == 1 && nor[24 + i * 0x14 + 5] == 0)
|
| | 79 | + memcpy(&sysi[0x92], &norword[6 + i * 5 + 2], 4);
|
| | 80 | + break;
|
| | 81 | + case 0x4d6f6423: // Mod#
|
| | 82 | + memcpy(&sysi[0x98], &norword[6 + i * 5 + 1], 16);
|
| | 83 | + break;
|
| | 84 | + case 0x436f6463: // Codc
|
| | 85 | + sysiword[0x45] = norword[6 + i * 5 + 1];
|
| | 86 | + break;
|
| | 87 | + case 0x53775672: // SwVr
|
| | 88 | + memcpy(&sysi[0x108], &norword[6 + i * 5 + 1], 16);
|
| | 89 | + break;
|
| | 90 | + }
|
| | 91 | + switch (sysiword[0x21])
|
| | 92 | + {
|
| | 93 | + case 0x130100:
|
| | 94 | + sysiword[0x47] = 0x1308004;
|
| | 95 | + break;
|
| | 96 | + case 0x130200:
|
| | 97 | + sysiword[0x47] = 0x1708004;
|
| | 98 | + break;
|
| | 99 | + }
|
| | 100 | + }
|
| | 101 | + free(nor);
|
| 32 | 102 | }
|
| | 103 | +
|
| | 104 | +void targetinit_execfirmware() ICODE_ATTR;
|
| | 105 | +void targetinit_execfirmware()
|
| | 106 | +{
|
| | 107 | + clockgate_enable(CLOCKGATE_I2C_0, true);
|
| | 108 | + while (IIC10(0));
|
| | 109 | + IICCON(0) = 0x184;
|
| | 110 | +}
|
| | 111 | +
|
| Index: emcore/trunk/target/ipodnano3g/clockgates.c |
| — | — | @@ -32,6 +32,7 @@ |
| 33 | 33 | return !(PWRCON(gate >> 5) & (1 << (gate & 0x1f)));
|
| 34 | 34 | }
|
| 35 | 35 |
|
| | 36 | +void clockgate_enable(int gate, bool enable) ICODE_ATTR;
|
| 36 | 37 | void clockgate_enable(int gate, bool enable)
|
| 37 | 38 | {
|
| 38 | 39 | uint32_t mode = enter_critical_section();
|
