freemyipod r648 - Code Review

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Repository:freemyipod
Revision:< r647‎ | r648 | r649 >
Date:04:04, 1 March 2011
Author:theseven
Status:new
Tags:
Comment:
emCORE: Shave off 3 instructions from the innermost loop of the dithering code by doing saturation more cleverly
Modified paths:
  • /emcore/trunk/target/ipodnano2g/lcd.c (modified) (history)
  • /emcore/trunk/target/ipodnano3g/lcd.c (modified) (history)
  • /emcore/trunk/target/ipodnano4g/lcd.c (modified) (history)

Diff [purge]

Index: emcore/trunk/target/ipodnano2g/lcd.c
——@@ -257,10 +257,9 @@
258258 __asm__ volatile(" ldrsb r0, [r7] \n");
259259 __asm__ volatile(" add r1, r1, r4 \n");
260260 __asm__ volatile(" add r1, r1, r0 \n");
261 - __asm__ volatile(" cmp r1, #0 \n");
262 - __asm__ volatile(" movlt r1, #0 \n");
263 - __asm__ volatile(" cmp r1, #0xff \n");
264 - __asm__ volatile(" movgt r1, #0xff \n");
 261+ __asm__ volatile(" cmp r1, #0xff \n");
 262+ __asm__ volatile(" mvnhi r1, r1,asr#31 \n");
 263+ __asm__ volatile(" andhi r1, r1, #0xff \n");
265264 __asm__ volatile(" mov r0, r1,lsr#3 \n");
266265 __asm__ volatile(" orr r2, r0,lsl#11 \n");
267266 __asm__ volatile(" sub r1, r1, r0,lsl#3 \n");
——@@ -273,10 +272,9 @@
274273 __asm__ volatile(" ldrsb r0, [r7] \n");
275274 __asm__ volatile(" add r1, r1, r5 \n");
276275 __asm__ volatile(" add r1, r1, r0 \n");
277 - __asm__ volatile(" cmp r1, #0 \n");
278 - __asm__ volatile(" movlt r1, #0 \n");
279 - __asm__ volatile(" cmp r1, #0xff \n");
280 - __asm__ volatile(" movgt r1, #0xff \n");
 276+ __asm__ volatile(" cmp r1, #0xff \n");
 277+ __asm__ volatile(" mvnhi r1, r1,asr#31 \n");
 278+ __asm__ volatile(" andhi r1, r1, #0xff \n");
281279 __asm__ volatile(" mov r0, r1,lsr#2 \n");
282280 __asm__ volatile(" orr r2, r0,lsl#5 \n");
283281 __asm__ volatile(" sub r1, r1, r0,lsl#2 \n");
——@@ -289,10 +287,9 @@
290288 __asm__ volatile(" ldrsb r0, [r7] \n");
291289 __asm__ volatile(" add r1, r1, r6 \n");
292290 __asm__ volatile(" add r1, r1, r0 \n");
293 - __asm__ volatile(" cmp r1, #0 \n");
294 - __asm__ volatile(" movlt r1, #0 \n");
295 - __asm__ volatile(" cmp r1, #0xff \n");
296 - __asm__ volatile(" movgt r1, #0xff \n");
 291+ __asm__ volatile(" cmp r1, #0xff \n");
 292+ __asm__ volatile(" mvnhi r1, r1,asr#31 \n");
 293+ __asm__ volatile(" andhi r1, r1, #0xff \n");
297294 __asm__ volatile(" mov r0, r1,lsr#3 \n");
298295 __asm__ volatile(" orr r2, r0 \n");
299296 __asm__ volatile(" sub r1, r1, r0,lsl#3 \n");
Index: emcore/trunk/target/ipodnano3g/lcd.c
——@@ -95,15 +95,21 @@
9696 }
9797 switch (lcd_detect())
9898 {
 99+// case 0:
 100+// pmu_write(0x31, 0x0b); // Vlcd @ 2.000V
 101+// break;
99102 case 1:
100 - pmu_write(0x31, 0x0e); // Vlcd @ 2.400V
101 - break;
 103+ pmu_write(0x31, 0x0e); // Vlcd @ 2.300V
 104+ break;
102105 case 2:
103 - pmu_write(0x31, 0x12); // Vlcd @ 2.700V
104 - break;
 106+ pmu_write(0x31, 0x12); // Vlcd @ 2.700V
 107+ break;
 108+// case 3:
 109+// pmu_write(0x31, 0x0b); // Vlcd @ 2.000V
 110+// break;
105111 default:
106 - pmu_write(0x31, 0x0b); // Vlcd @ 2.000V
107 - }
 112+ pmu_write(0x31, 0x0b); // Vlcd @ 2.000V
 113+ }
108114 }
109115
110116 bool displaylcd_busy() ICODE_ATTR;
——@@ -184,7 +190,7 @@
185191 lli->nextlli = last ? NULL : &lcd_lli[i + 1];
186192 lli->control = 0x70240000 | (last ? pixels : 0xfff)
187193 | (last ? 0x80000000 : 0) | (solid ? 0 : 0x4000000);
188 - if (!solid) data = (void*)(((uint32_t)data) + 0x1ffe);
 194+ if (!solid) data += 0x1ffe;
189195 }
190196 clean_dcache();
191197 DMAC0C4CONFIG = 0x88c1;
——@@ -266,10 +272,9 @@
267273 __asm__ volatile(" ldrsb r0, [r7] \n");
268274 __asm__ volatile(" add r1, r1, r4 \n");
269275 __asm__ volatile(" add r1, r1, r0 \n");
270 - __asm__ volatile(" cmp r1, #0 \n");
271 - __asm__ volatile(" movlt r1, #0 \n");
272276 __asm__ volatile(" cmp r1, #0xff \n");
273 - __asm__ volatile(" movgt r1, #0xff \n");
 277+ __asm__ volatile(" mvnhi r1, r1,asr#31 \n");
 278+ __asm__ volatile(" andhi r1, r1, #0xff \n");
274279 __asm__ volatile(" mov r0, r1,lsr#3 \n");
275280 __asm__ volatile(" orr r2, r0,lsl#11 \n");
276281 __asm__ volatile(" sub r1, r1, r0,lsl#3 \n");
——@@ -282,10 +287,9 @@
283288 __asm__ volatile(" ldrsb r0, [r7] \n");
284289 __asm__ volatile(" add r1, r1, r5 \n");
285290 __asm__ volatile(" add r1, r1, r0 \n");
286 - __asm__ volatile(" cmp r1, #0 \n");
287 - __asm__ volatile(" movlt r1, #0 \n");
288291 __asm__ volatile(" cmp r1, #0xff \n");
289 - __asm__ volatile(" movgt r1, #0xff \n");
 292+ __asm__ volatile(" mvnhi r1, r1,asr#31 \n");
 293+ __asm__ volatile(" andhi r1, r1, #0xff \n");
290294 __asm__ volatile(" mov r0, r1,lsr#2 \n");
291295 __asm__ volatile(" orr r2, r0,lsl#5 \n");
292296 __asm__ volatile(" sub r1, r1, r0,lsl#2 \n");
——@@ -298,10 +302,9 @@
299303 __asm__ volatile(" ldrsb r0, [r7] \n");
300304 __asm__ volatile(" add r1, r1, r6 \n");
301305 __asm__ volatile(" add r1, r1, r0 \n");
302 - __asm__ volatile(" cmp r1, #0 \n");
303 - __asm__ volatile(" movlt r1, #0 \n");
304306 __asm__ volatile(" cmp r1, #0xff \n");
305 - __asm__ volatile(" movgt r1, #0xff \n");
 307+ __asm__ volatile(" mvnhi r1, r1,asr#31 \n");
 308+ __asm__ volatile(" andhi r1, r1, #0xff \n");
306309 __asm__ volatile(" mov r0, r1,lsr#3 \n");
307310 __asm__ volatile(" orr r2, r0 \n");
308311 __asm__ volatile(" sub r1, r1, r0,lsl#3 \n");
Index: emcore/trunk/target/ipodnano4g/lcd.c
——@@ -230,10 +230,9 @@
231231 __asm__ volatile(" ldrsb r0, [r7] \n");
232232 __asm__ volatile(" add r1, r1, r4 \n");
233233 __asm__ volatile(" add r1, r1, r0 \n");
234 - __asm__ volatile(" cmp r1, #0 \n");
235 - __asm__ volatile(" movlt r1, #0 \n");
236 - __asm__ volatile(" cmp r1, #0xff \n");
237 - __asm__ volatile(" movgt r1, #0xff \n");
 234+ __asm__ volatile(" cmp r1, #0xff \n");
 235+ __asm__ volatile(" mvnhi r1, r1,asr#31 \n");
 236+ __asm__ volatile(" andhi r1, r1, #0xff \n");
238237 __asm__ volatile(" mov r0, r1,lsr#3 \n");
239238 __asm__ volatile(" orr r2, r0,lsl#11 \n");
240239 __asm__ volatile(" sub r1, r1, r0,lsl#3 \n");
——@@ -246,10 +245,9 @@
247246 __asm__ volatile(" ldrsb r0, [r7] \n");
248247 __asm__ volatile(" add r1, r1, r5 \n");
249248 __asm__ volatile(" add r1, r1, r0 \n");
250 - __asm__ volatile(" cmp r1, #0 \n");
251 - __asm__ volatile(" movlt r1, #0 \n");
252 - __asm__ volatile(" cmp r1, #0xff \n");
253 - __asm__ volatile(" movgt r1, #0xff \n");
 249+ __asm__ volatile(" cmp r1, #0xff \n");
 250+ __asm__ volatile(" mvnhi r1, r1,asr#31 \n");
 251+ __asm__ volatile(" andhi r1, r1, #0xff \n");
254252 __asm__ volatile(" mov r0, r1,lsr#2 \n");
255253 __asm__ volatile(" orr r2, r0,lsl#5 \n");
256254 __asm__ volatile(" sub r1, r1, r0,lsl#2 \n");
——@@ -262,10 +260,9 @@
263261 __asm__ volatile(" ldrsb r0, [r7] \n");
264262 __asm__ volatile(" add r1, r1, r6 \n");
265263 __asm__ volatile(" add r1, r1, r0 \n");
266 - __asm__ volatile(" cmp r1, #0 \n");
267 - __asm__ volatile(" movlt r1, #0 \n");
268 - __asm__ volatile(" cmp r1, #0xff \n");
269 - __asm__ volatile(" movgt r1, #0xff \n");
 264+ __asm__ volatile(" cmp r1, #0xff \n");
 265+ __asm__ volatile(" mvnhi r1, r1,asr#31 \n");
 266+ __asm__ volatile(" andhi r1, r1, #0xff \n");
270267 __asm__ volatile(" mov r0, r1,lsr#3 \n");
271268 __asm__ volatile(" orr r2, r0 \n");
272269 __asm__ volatile(" sub r1, r1, r0,lsl#3 \n");
Retrieved from "https://freemyipod.org/wiki/Special:Code/freemyipod/648"