freemyipod r636 - Code Review

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Repository:freemyipod
Revision:r635‎ | r636 | r637 >
Date:20:55, 20 February 2011
Author:theseven
Status:new
Tags:
Comment:
emCORE: A bunch of cache coherency fixes
Modified paths:
  • /emcore/trunk/target/ipodclassic/storage_ata.c (modified) (history)
  • /emcore/trunk/target/ipodnano2g/hwkeyaes.c (modified) (history)
  • /emcore/trunk/target/ipodnano2g/nand.c (modified) (history)
  • /emcore/trunk/target/ipodnano3g/hwkeyaes.c (modified) (history)
  • /emcore/trunk/target/ipodnano3g/spi.c (modified) (history)
  • /emcore/trunk/usb/synopsysotg.c (modified) (history)

Diff [purge]

Index: emcore/trunk/target/ipodnano2g/hwkeyaes.c
@@ -58,12 +58,11 @@
5959 AESOUTADDR = (void*)((uint32_t)data + (ptr << 2));
6060 AESINADDR = (void*)((uint32_t)data + (ptr << 2));
6161 AESAUXADDR = (void*)((uint32_t)data + (ptr << 2));
62 - clean_dcache();
 62+ invalidate_dcache();
6363 AESSTATUS = 6;
6464 AESGO = go;
6565 go = 3;
6666 while ((AESSTATUS & 6) == 0);
67 - invalidate_dcache();
6867 if (direction == HWKEYAES_DECRYPT)
6968 {
7069 if (!ptr) break;
Index: emcore/trunk/target/ipodnano2g/nand.c
@@ -226,7 +226,8 @@
227227 DMACOM3 = DMACOM_CLEARBOTHDONE;
228228 DMABASE3 = buffer;
229229 DMATCNT3 = (size >> 4) - 1;
230 - clean_dcache();
 230+ if (direction) clean_dcache();
 231+ else invalidate_dcache();
231232 DMACOM3 = 4;
232233 }
233234
@@ -235,7 +236,6 @@
236237 uint32_t timeout = USEC_TIMER + 20000;
237238 while (DMAALLST & DMAALLST_DMABUSY3)
238239 if (nand_timeout(timeout)) return 1;
239 - if (!direction) invalidate_dcache();
240240 if (nand_wait_addrdone()) return 1;
241241 if (!direction) FMCTRL1 = FMCTRL1_CLEARRFIFO | FMCTRL1_CLEARWFIFO;
242242 else FMCTRL1 = FMCTRL1_CLEARRFIFO;
@@ -259,7 +259,7 @@
260260 ECC_UNK1 = size;
261261 ECC_DATA_PTR = databuffer;
262262 ECC_SPARE_PTR = sparebuffer;
263 - clean_dcache();
 263+ invalidate_dcache();
264264 ECC_CTRL = type;
265265 }
266266
@@ -268,7 +268,6 @@
269269 uint32_t timeout = USEC_TIMER + 20000;
270270 while (!(SRCPND & (1 << IRQ_ECC)))
271271 if (nand_timeout(timeout)) return ecc_unlock(1);
272 - invalidate_dcache();
273272 ECC_INT_CLR = 1;
274273 SRCPND = (1 << IRQ_ECC);
275274 return ecc_unlock(ECC_RESULT);
Index: emcore/trunk/target/ipodnano3g/hwkeyaes.c
@@ -51,9 +51,8 @@
5252 AESAUXSIZE = size;
5353 AESAUXADDR = data;
5454 AESSIZE3 = size;
55 - clean_dcache();
 55+ invalidate_dcache();
5656 AESGO = 1;
57 - invalidate_dcache();
5857 while (!(AESSTATUS & 0xf)) sleep(MIN(10000, size >> 4));
5958 clockgate_enable(10, false);
6059 mutex_unlock(&hwkeyaes_mutex);
Index: emcore/trunk/target/ipodnano3g/spi.c
@@ -94,11 +94,10 @@
9595 nextlli = lli;
9696 lli = &lli[-1];
9797 }
98 - clean_dcache();
 98+ invalidate_dcache();
9999 DMAC0CCONFIG(port + 5) = 0x9001 | (SPIDMA(port) << 1);
100100 wakeup_wait(&spiwakeup[port], TIMEOUT_BLOCK);
101101 clockgate_dma(0, port + 5, false);
102 - invalidate_dcache();
103102 SPISETUP(port) &= ~0x41;
104103 }
105104
Index: emcore/trunk/target/ipodclassic/storage_ata.c
@@ -41,7 +41,7 @@
4242
4343 /** static, private data **/
4444 static uint8_t ceata_taskfile[16] __attribute__((aligned(16)));
45 -uint16_t ata_identify_data[0x100];
 45+uint16_t ata_identify_data[0x100] __attribute__((aligned(16)));
4646 bool ceata;
4747 bool ata_lba48;
4848 bool ata_dma;
@@ -343,6 +343,7 @@
344344 SDCI_DMACOUNT = 1;
345345 SDCI_DMAADDR = dest;
346346 SDCI_DCTRL = SDCI_DCTRL_TXFIFORST | SDCI_DCTRL_RXFIFORST;
 347+ invalidate_dcache();
347348 PASS_RC(mmc_send_command(SDCI_CMD_CMD_NUM(MMC_CMD_CEATA_RW_MULTIPLE_REG)
348349 | SDCI_CMD_CMD_TYPE_ADTC | SDCI_CMD_RES_TYPE_R1
349350 | SDCI_CMD_RES_SIZE_48 | SDCI_CMD_NCR_NID_NCR,
@@ -352,7 +353,6 @@
353354 NULL, CEATA_COMMAND_TIMEOUT), 2, 1);
354355 long startusec = USEC_TIMER;
355356 if (wakeup_wait(&mmc_wakeup, CEATA_COMMAND_TIMEOUT) == THREAD_TIMEOUT) RET_ERR(2);
356 - invalidate_dcache();
357357 PASS_RC(mmc_dsta_check_data_success(), 2, 3);
358358 return 0;
359359 }
@@ -472,7 +472,6 @@
473473 uint32_t direction;
474474 if (write)
475475 {
476 - clean_dcache();
477476 cmdtype = SDCI_CMD_CMD_TYPE_ADTC | SDCI_CMD_CMD_RD_WR;
478477 responsetype = SDCI_CMD_RES_TYPE_R1 | SDCI_CMD_RES_BUSY;
479478 direction = MMC_CMD_CEATA_RW_MULTIPLE_BLOCK_DIRECTION_WRITE;
@@ -487,6 +486,7 @@
488487 SDCI_DMAADDR = buf;
489488 SDCI_DMACOUNT = count;
490489 SDCI_DCTRL = SDCI_DCTRL_TXFIFORST | SDCI_DCTRL_RXFIFORST;
 490+ invalidate_dcache();
491491 PASS_RC(mmc_send_command(SDCI_CMD_CMD_NUM(MMC_CMD_CEATA_RW_MULTIPLE_BLOCK)
492492 | SDCI_CMD_CMD_TYPE_ADTC | cmdtype | responsetype
493493 | SDCI_CMD_RES_SIZE_48 | SDCI_CMD_NCR_NID_NCR,
@@ -498,7 +498,6 @@
499499 PASS_RC(ceata_cancel_command(), 4, 1);
500500 RET_ERR(2);
501501 }
502 - if (!write) invalidate_dcache();
503502 PASS_RC(mmc_dsta_check_data_success(), 4, 3);
504503 if (wakeup_wait(&mmc_comp_wakeup, timeout) == THREAD_TIMEOUT)
505504 {
@@ -519,11 +518,6 @@
520519 PASS_RC(ceata_wait_idle(), 2, 0);
521520 PASS_RC(ceata_write_multiple_register(0, ceata_taskfile, 16), 2, 1);
522521 PASS_RC(ceata_rw_multiple_block(false, buf, 1, CEATA_COMMAND_TIMEOUT), 2, 2);
523 - for (i = 0; i < 0x100; i++)
524 - {
525 - uint16_t word = buf[i];
526 - buf[i] = (word >> 8) | (word << 8);
527 - }
528522 }
529523 else
530524 {
Index: emcore/trunk/usb/synopsysotg.c
@@ -192,7 +192,6 @@
193193 {
194194 if (epints & 1) /* Transfer completed */
195195 {
196 - invalidate_dcache();
197196 int bytes = endpoints[i].size - (DIEPTSIZ(i) & 0x3FFFF);
198197 if (endpoints[i].busy)
199198 {
@@ -224,7 +223,6 @@
225224 {
226225 if (epints & 1) /* Transfer completed */
227226 {
228 - invalidate_dcache();
229227 int bytes = endpoints[i].size - (DOEPTSIZ(i) & 0x3FFFF);
230228 if (endpoints[i].busy)
231229 {
@@ -300,7 +298,7 @@
301299 DOEPTSIZ(ep) = length | (packets << 19);
302300 DOEPDMA(ep) = ptr;
303301 }
304 - clean_dcache();
 302+ invalidate_dcache();
305303 DOEPCTL(ep) |= 0x84000000; /* EPx OUT ENABLE CLEARNAK */
306304 }
307305