freemyipod r278 - Code Review

Repository:	freemyipod
Revision:	< r277‎ \| r278 \| r279 >
Date:	12:03, 23 November 2010
Author:	theseven
Status:	new
Tags:
Comment:	emBIOS: Optimize s5l8702/s5l8720 LCD drivers a bit.
Modified paths:	/embios/trunk/target/ipodnano3g/lcd.c (modified) (history) /embios/trunk/target/ipodnano3g/s5l8702.h (modified) (history) /embios/trunk/target/ipodnano4g/lcd.c (modified) (history) /embios/trunk/target/ipodnano4g/s5l8720.h (modified) (history)

Diff [purge]

Index: embios/trunk/target/ipodnano3g/lcd.c
—	—	@@ -27,13 +27,8 @@
28	28	#include "util.h"
29	29
30	30
31		~~-static struct dma_lli~~
32		-{
33		~~- void* srcaddr;~~
34		~~- void* dstaddr;~~
35		~~- struct dma_lli* nextlli;~~
36		~~- uint32_t control;~~
37		~~-} lcd_lli[(LCD_WIDTH * LCD_HEIGHT - 1) / 0xfff] IDATA_ATTR __attribute__((aligned(16)));~~
	31	+static struct dma_lli lcd_lli[(LCD_WIDTH * LCD_HEIGHT - 1) / 0xfff]
	32	+ IDATA_ATTR __attribute__((aligned(16)));
38	33
39	34	static uint16_t lcd_color IDATA_ATTR;
40	35
—	—	@@ -128,25 +123,19 @@
129	124	lcd_send_cmd(0x2c);
130	125	}
131	126	int pixels = (endx - startx + 1) * (endy - starty + 1);
	127	+ if (pixels <= 0) return;
132	128	int i;
133	129	bool solid = (int)data == -1;
134		~~- bool last = !ARRAYLEN(lcd_lli) \|\| pixels <= 0xfff;~~
135	130	if (solid) lcd_color = color;
136		~~- DMAC0C0SRCADDR = solid ? &lcd_color : data;~~
137		~~- DMAC0C0DESTADDR = (void*)((int)&LCDWDATA);~~
138		~~- DMAC0C0LLI = last ? (void*)0 : lcd_lli;~~
139		~~- DMAC0C0CONTROL = 0x70240000 \| (last ? pixels : 0xfff)~~
140		~~- \| (last ? 0x80000000 : 0) \| (solid ? 0 : 0x4000000);~~
141		~~- void* origdata=data;~~
142		~~- data = (void*)(((uint32_t)data) + 0x1ffe);~~
143		~~- for (i = 0, pixels -= 0xfff; i < ARRAYLEN(lcd_lli) && pixels > 0; i++, pixels -= 0xfff)~~
	131	+ for (i = -1; i < (int)ARRAYLEN(lcd_lli) && pixels > 0; i++, pixels -= 0xfff)
144	132	{
145		~~- last = i + 1 >= ARRAYLEN(lcd_lli) \|\| pixels <= 0xfff;~~
146		~~- lcd_lli[i].srcaddr = solid ? &lcd_color : data;~~
147		~~- lcd_lli[i].dstaddr = (void*)((int)&LCDWDATA);~~
148		~~- lcd_lli[i].nextlli = last ? (void*)0 : &lcd_lli[i + 1];~~
149		~~- lcd_lli[i].control = 0x70240000 \| (last ? pixels : 0xfff)~~
150		~~- \| (last ? 0x80000000 : 0) \| (solid ? 0 : 0x4000000);~~
	133	+ bool last = i + 1 >= ARRAYLEN(lcd_lli) \|\| pixels <= 0xfff;
	134	+ struct dma_lli* lli = i < 0 ? (struct dma_lli*)((int)&DMAC0C0LLI) : &lcd_lli[i];
	135	+ lli->srcaddr = solid ? &lcd_color : data;
	136	+ lli->dstaddr = (void*)((int)&LCDWDATA);
	137	+ lli->nextlli = last ? NULL : &lcd_lli[i + 1];
	138	+ lli->control = 0x70240000 \| (last ? pixels : 0xfff)
	139	+ \| (last ? 0x80000000 : 0) \| (solid ? 0 : 0x4000000);
151	140	data = (void*)(((uint32_t)data) + 0x1ffe);
152	141	}
153	142	clean_dcache();
Index: embios/trunk/target/ipodnano3g/s5l8702.h
—	—	@@ -359,6 +359,13 @@
360	360
361	361
362	362	/////DMA/////
	363	+struct dma_lli
	364	+{
	365	+ void* srcaddr;
	366	+ void* dstaddr;
	367	+ const struct dma_lli* nextlli;
	368	+ uint32_t control;
	369	+};
363	370	#define DMACINTSTS(d) (((uint32_t volatile)(0x38200000 + 0x1700000 * (d))))
364	371	#define DMACINTTCSTS(d) (((uint32_t volatile)(0x38200004 + 0x1700000 * (d))))
365	372	#define DMACINTTCCLR(d) (((uint32_t volatile)(0x38200008 + 0x1700000 * (d))))
—	—	@@ -373,9 +380,10 @@
374	381	#define DMACSOFTLSREQ(d) (((uint32_t volatile)(0x3820002c + 0x1700000 * (d))))
375	382	#define DMACCONFIG(d) (((uint32_t volatile)(0x38200030 + 0x1700000 * (d))))
376	383	#define DMACSYNC(d) (((uint32_t volatile)(0x38200034 + 0x1700000 * (d))))
	384	+#define DMACCLLI(d, c) (((struct dma_lli volatile)(0x38200100 + 0x1700000 * (d) + 0x20 * (c))))
377	385	#define DMACCSRCADDR(d, c) (((const void volatile)(0x38200100 + 0x1700000 (d) + 0x20 * (c))))
378	386	#define DMACCDESTADDR(d, c) (((void volatile)(0x38200104 + 0x1700000 (d) + 0x20 * (c))))
379		~~-#define DMACCLLI(d, c) (((const void volatile)(0x38200108 + 0x1700000 (d) + 0x20 * (c))))~~
	387	+#define DMACCNEXTLLI(d, c) (((const void volatile)(0x38200108 + 0x1700000 (d) + 0x20 * (c))))
380	388	#define DMACCCONTROL(d, c) (((uint32_t volatile)(0x3820010c + 0x1700000 * (d) + 0x20 * (c))))
381	389	#define DMACCCONFIG(d, c) (((uint32_t volatile)(0x38200110 + 0x1700000 * (d) + 0x20 * (c))))
382	390	#define DMAC0INTSTS (((uint32_t volatile)(0x38200000)))
—	—	@@ -392,49 +400,58 @@
393	401	#define DMAC0SOFTLSREQ (((uint32_t volatile)(0x3820002c)))
394	402	#define DMAC0CONFIG (((uint32_t volatile)(0x38200030)))
395	403	#define DMAC0SYNC (((uint32_t volatile)(0x38200034)))
	404	+#define DMAC0CLLI(c) (((struct dma_lli volatile)(0x38200100 + 0x20 * (c))))
396	405	#define DMAC0CSRCADDR(c) (((const void volatile)(0x38200100 + 0x20 (c))))
397	406	#define DMAC0CDESTADDR(c) (((void volatile)(0x38200104 + 0x20 (c))))
398		~~-#define DMAC0CLLI(c) (((const void volatile)(0x38200108 + 0x20 (c))))~~
	407	+#define DMAC0CNEXTLLI(c) (((const void volatile)(0x38200108 + 0x20 (c))))
399	408	#define DMAC0CCONTROL(c) (((uint32_t volatile)(0x3820010c + 0x20 * (c))))
400	409	#define DMAC0CCONFIG(c) (((uint32_t volatile)(0x38200110 + 0x20 * (c))))
	410	+#define DMAC0C0LLI (((struct dma_lli volatile)(0x38200100)))
401	411	#define DMAC0C0SRCADDR (((const void volatile*)(0x38200100)))
402	412	#define DMAC0C0DESTADDR (((void volatile*)(0x38200104)))
403		~~-#define DMAC0C0LLI (((const void volatile*)(0x38200108)))~~
	413	+#define DMAC0C0NEXTLLI (((const struct dma_lli volatile*)(0x38200108)))
404	414	#define DMAC0C0CONTROL (((uint32_t volatile)(0x3820010c)))
405	415	#define DMAC0C0CONFIG (((uint32_t volatile)(0x38200110)))
	416	+#define DMAC0C1LLI (((struct dma_lli volatile)(0x38200120)))
406	417	#define DMAC0C1SRCADDR (((const void volatile*)(0x38200120)))
407	418	#define DMAC0C1DESTADDR (((void volatile*)(0x38200124)))
408		~~-#define DMAC0C1LLI (((const void volatile*)(0x38200128)))~~
	419	+#define DMAC0C1NEXTLLI (((const struct dma_lli volatile*)(0x38200128)))
409	420	#define DMAC0C1CONTROL (((uint32_t volatile)(0x3820012c)))
410	421	#define DMAC0C1CONFIG (((uint32_t volatile)(0x38200130)))
	422	+#define DMAC0C2LLI (((struct dma_lli volatile)(0x38200140)))
411	423	#define DMAC0C2SRCADDR (((const void volatile*)(0x38200140)))
412	424	#define DMAC0C2DESTADDR (((void volatile*)(0x38200144)))
413		~~-#define DMAC0C2LLI (((const void volatile*)(0x38200148)))~~
	425	+#define DMAC0C2NEXTLLI (((const struct dma_lli volatile*)(0x38200148)))
414	426	#define DMAC0C2CONTROL (((uint32_t volatile)(0x3820014c)))
415	427	#define DMAC0C2CONFIG (((uint32_t volatile)(0x38200150)))
	428	+#define DMAC0C3LLI (((struct dma_lli volatile)(0x38200160)))
416	429	#define DMAC0C3SRCADDR (((const void volatile*)(0x38200160)))
417	430	#define DMAC0C3DESTADDR (((void volatile*)(0x38200164)))
418		~~-#define DMAC0C3LLI (((const void volatile*)(0x38200168)))~~
	431	+#define DMAC0C3NEXTLLI (((const struct dma_lli volatile*)(0x38200168)))
419	432	#define DMAC0C3CONTROL (((uint32_t volatile)(0x3820016c)))
420	433	#define DMAC0C3CONFIG (((uint32_t volatile)(0x38200170)))
	434	+#define DMAC0C4LLI (((struct dma_lli volatile)(0x38200180)))
421	435	#define DMAC0C4SRCADDR (((const void volatile*)(0x38200180)))
422	436	#define DMAC0C4DESTADDR (((void volatile*)(0x38200184)))
423		~~-#define DMAC0C4LLI (((const void volatile*)(0x38200188)))~~
	437	+#define DMAC0C4NEXTLLI (((const struct dma_lli volatile*)(0x38200188)))
424	438	#define DMAC0C4CONTROL (((uint32_t volatile)(0x3820018c)))
425	439	#define DMAC0C4CONFIG (((uint32_t volatile)(0x38200190)))
	440	+#define DMAC0C5LLI (((struct dma_lli volatile)(0x382001a0)))
426	441	#define DMAC0C5SRCADDR (((const void volatile*)(0x382001a0)))
427	442	#define DMAC0C5DESTADDR (((void volatile*)(0x382001a4)))
428		~~-#define DMAC0C5LLI (((const void volatile*)(0x382001a8)))~~
	443	+#define DMAC0C5NEXTLLI (((const struct dma_lli volatile*)(0x382001a8)))
429	444	#define DMAC0C5CONTROL (((uint32_t volatile)(0x382001ac)))
430	445	#define DMAC0C5CONFIG (((uint32_t volatile)(0x382001b0)))
	446	+#define DMAC0C6LLI (((struct dma_lli volatile)(0x382001c0)))
431	447	#define DMAC0C6SRCADDR (((const void volatile*)(0x382001c0)))
432	448	#define DMAC0C6DESTADDR (((void volatile*)(0x382001c4)))
433		~~-#define DMAC0C6LLI (((const void volatile*)(0x382001c8)))~~
	449	+#define DMAC0C6NEXTLLI (((const struct dma_lli volatile*)(0x382001c8)))
434	450	#define DMAC0C6CONTROL (((uint32_t volatile)(0x382001cc)))
435	451	#define DMAC0C6CONFIG (((uint32_t volatile)(0x382001d0)))
	452	+#define DMAC0C7LLI (((struct dma_lli volatile)(0x382001e0)))
436	453	#define DMAC0C7SRCADDR (((const void volatile*)(0x382001e0)))
437	454	#define DMAC0C7DESTADDR (((void volatile*)(0x382001e4)))
438		~~-#define DMAC0C7LLI (((const void volatile*)(0x382001e8)))~~
	455	+#define DMAC0C7NEXTLLI (((const struct dma_lli volatile*)(0x382001e8)))
439	456	#define DMAC0C7CONTROL (((uint32_t volatile)(0x382001ec)))
440	457	#define DMAC0C7CONFIG (((uint32_t volatile)(0x382001f0)))
441	458	#define DMAC1INTSTS (((uint32_t volatile)(0x39900000)))
—	—	@@ -451,49 +468,58 @@
452	469	#define DMAC1SOFTLSREQ (((uint32_t volatile)(0x3990002c)))
453	470	#define DMAC1CONFIG (((uint32_t volatile)(0x39900030)))
454	471	#define DMAC1SYNC (((uint32_t volatile)(0x39900034)))
	472	+#define DMAC1CLLI(c) (((struct dma_lli volatile)(0x39900100 + 0x20 * (c))))
455	473	#define DMAC1CSRCADDR(c) (((const void volatile)(0x39900100 + 0x20 (c))))
456	474	#define DMAC1CDESTADDR(c) (((void volatile)(0x39900104 + 0x20 (c))))
457		~~-#define DMAC1CLLI(c) (((const void volatile)(0x39900108 + 0x20 (c))))~~
	475	+#define DMAC1CNEXTLLI(c) (((const void volatile)(0x39900108 + 0x20 (c))))
458	476	#define DMAC1CCONTROL(c) (((uint32_t volatile)(0x3990010c + 0x20 * (c))))
459	477	#define DMAC1CCONFIG(c) (((uint32_t volatile)(0x39900110 + 0x20 * (c))))
	478	+#define DMAC1C0LLI (((struct dma_lli volatile)(0x39900100)))
460	479	#define DMAC1C0SRCADDR (((const void volatile*)(0x39900100)))
461	480	#define DMAC1C0DESTADDR (((void volatile*)(0x39900104)))
462		~~-#define DMAC1C0LLI (((const void volatile*)(0x39900108)))~~
	481	+#define DMAC1C0NEXTLLI (((const struct dma_lli volatile*)(0x39900108)))
463	482	#define DMAC1C0CONTROL (((uint32_t volatile)(0x3990010c)))
464	483	#define DMAC1C0CONFIG (((uint32_t volatile)(0x39900110)))
	484	+#define DMAC1C1LLI (((struct dma_lli volatile)(0x39900120)))
465	485	#define DMAC1C1SRCADDR (((const void volatile*)(0x39900120)))
466	486	#define DMAC1C1DESTADDR (((void volatile*)(0x39900124)))
467		~~-#define DMAC1C1LLI (((const void volatile*)(0x39900128)))~~
	487	+#define DMAC1C1NEXTLLI (((const struct dma_lli volatile*)(0x39900128)))
468	488	#define DMAC1C1CONTROL (((uint32_t volatile)(0x3990012c)))
469	489	#define DMAC1C1CONFIG (((uint32_t volatile)(0x39900130)))
	490	+#define DMAC1C2LLI (((struct dma_lli volatile)(0x39900140)))
470	491	#define DMAC1C2SRCADDR (((const void volatile*)(0x39900140)))
471	492	#define DMAC1C2DESTADDR (((void volatile*)(0x39900144)))
472		~~-#define DMAC1C2LLI (((const void volatile*)(0x39900148)))~~
	493	+#define DMAC1C2NEXTLLI (((const struct dma_lli volatile*)(0x39900148)))
473	494	#define DMAC1C2CONTROL (((uint32_t volatile)(0x3990014c)))
474	495	#define DMAC1C2CONFIG (((uint32_t volatile)(0x39900150)))
	496	+#define DMAC1C3LLI (((struct dma_lli volatile)(0x39900160)))
475	497	#define DMAC1C3SRCADDR (((const void volatile*)(0x39900160)))
476	498	#define DMAC1C3DESTADDR (((void volatile*)(0x39900164)))
477		~~-#define DMAC1C3LLI (((volatile vvoid*)(0x39900168)))~~
	499	+#define DMAC1C3NEXTLLI (((volatile void*)(0x39900168)))
478	500	#define DMAC1C3CONTROL (((uint32_t volatile)(0x3990016c)))
479	501	#define DMAC1C3CONFIG (((uint32_t volatile)(0x39900170)))
	502	+#define DMAC1C4LLI (((struct dma_lli volatile)(0x39900180)))
480	503	#define DMAC1C4SRCADDR (((const void volatile*)(0x39900180)))
481	504	#define DMAC1C4DESTADDR (((void volatile*)(0x39900184)))
482		~~-#define DMAC1C4LLI (((const void volatile*)(0x39900188)))~~
	505	+#define DMAC1C4NEXTLLI (((const struct dma_lli volatile*)(0x39900188)))
483	506	#define DMAC1C4CONTROL (((uint32_t volatile)(0x3990018c)))
484	507	#define DMAC1C4CONFIG (((uint32_t volatile)(0x39900190)))
	508	+#define DMAC1C5LLI (((struct dma_lli volatile)(0x399001a0)))
485	509	#define DMAC1C5SRCADDR (((const void volatile*)(0x399001a0)))
486	510	#define DMAC1C5DESTADDR (((void volatile*)(0x399001a4)))
487		~~-#define DMAC1C5LLI (((const void volatile*)(0x399001a8)))~~
	511	+#define DMAC1C5NEXTLLI (((const struct dma_lli volatile*)(0x399001a8)))
488	512	#define DMAC1C5CONTROL (((uint32_t volatile)(0x399001ac)))
489	513	#define DMAC1C5CONFIG (((uint32_t volatile)(0x399001b0)))
	514	+#define DMAC1C6LLI (((struct dma_lli volatile)(0x399001c0)))
490	515	#define DMAC1C6SRCADDR (((const void volatile*)(0x399001c0)))
491	516	#define DMAC1C6DESTADDR (((void volatile*)(0x399001c4)))
492		~~-#define DMAC1C6LLI (((const void volatile*)(0x399001c8)))~~
	517	+#define DMAC1C6NEXTLLI (((const struct dma_lli volatile*)(0x399001c8)))
493	518	#define DMAC1C6CONTROL (((uint32_t volatile)(0x399001cc)))
494	519	#define DMAC1C6CONFIG (((uint32_t volatile)(0x399001d0)))
	520	+#define DMAC1C7LLI (((struct dma_lli volatile)(0x399001e0)))
495	521	#define DMAC1C7SRCADDR (((const void volatile*)(0x399001e0)))
496	522	#define DMAC1C7DESTADDR (((void volatile*)(0x399001e4)))
497		~~-#define DMAC1C7LLI (((const void volatile*)(0x399001e8)))~~
	523	+#define DMAC1C7NEXTLLI (((const struct dma_lli volatile*)(0x399001e8)))
498	524	#define DMAC1C7CONTROL (((uint32_t volatile)(0x399001ec)))
499	525	#define DMAC1C7CONFIG (((uint32_t volatile)(0x399001f0)))
500	526
Index: embios/trunk/target/ipodnano4g/lcd.c
—	—	@@ -27,13 +27,8 @@
28	28	#include "util.h"
29	29
30	30
31		~~-static struct dma_lli~~
32		-{
33		~~- void* srcaddr;~~
34		~~- void* dstaddr;~~
35		~~- struct dma_lli* nextlli;~~
36		~~- uint32_t control;~~
37		~~-} lcd_lli[(LCD_WIDTH * LCD_HEIGHT - 1) / 0xfff] IDATA_ATTR __attribute__((aligned(16)));~~
	31	+static struct dma_lli lcd_lli[(LCD_WIDTH * LCD_HEIGHT - 1) / 0xfff]
	32	+ IDATA_ATTR __attribute__((aligned(16)));
38	33
39	34	static uint16_t lcd_color IDATA_ATTR;
40	35
—	—	@@ -102,23 +97,16 @@
103	98	int pixels = (endx - startx + 1) * (endy - starty + 1);
104	99	int i;
105	100	bool solid = (int)data == -1;
106		~~- bool last = !ARRAYLEN(lcd_lli) \|\| pixels <= 0xfff;~~
107	101	if (solid) lcd_color = color;
108		~~- DMAC0C0SRCADDR = solid ? &lcd_color : data;~~
109		~~- DMAC0C0DESTADDR = (void*)((int)&LCDWDATA);~~
110		~~- DMAC0C0LLI = last ? (void*)0 : lcd_lli;~~
111		~~- DMAC0C0CONTROL = 0x70240000 \| (last ? pixels : 0xfff)~~
112		~~- \| (last ? 0x80000000 : 0) \| (solid ? 0 : 0x4000000);~~
113		~~- void* origdata=data;~~
114		~~- data = (void*)(((uint32_t)data) + 0x1ffe);~~
115		~~- for (i = 0, pixels -= 0xfff; i < ARRAYLEN(lcd_lli) && pixels > 0; i++, pixels -= 0xfff)~~
	102	+ for (i = -1; i < (int)ARRAYLEN(lcd_lli) && pixels > 0; i++, pixels -= 0xfff)
116	103	{
117		~~- last = i + 1 >= ARRAYLEN(lcd_lli) \|\| pixels <= 0xfff;~~
118		~~- lcd_lli[i].srcaddr = solid ? &lcd_color : data;~~
119		~~- lcd_lli[i].dstaddr = (void*)((int)&LCDWDATA);~~
120		~~- lcd_lli[i].nextlli = last ? (void*)0 : &lcd_lli[i + 1];~~
121		~~- lcd_lli[i].control = 0x70240000 \| (last ? pixels : 0xfff)~~
122		~~- \| (last ? 0x80000000 : 0) \| (solid ? 0 : 0x4000000);~~
	104	+ bool last = i + 1 >= ARRAYLEN(lcd_lli) \|\| pixels <= 0xfff;
	105	+ struct dma_lli* lli = i < 0 ? (struct dma_lli*)((int)&DMAC0C0LLI) : &lcd_lli[i];
	106	+ lli->srcaddr = solid ? &lcd_color : data;
	107	+ lli->dstaddr = (void*)((int)&LCDWDATA);
	108	+ lli->nextlli = last ? NULL : &lcd_lli[i + 1];
	109	+ lli->control = 0x70240000 \| (last ? pixels : 0xfff)
	110	+ \| (last ? 0x80000000 : 0) \| (solid ? 0 : 0x4000000);
123	111	data = (void*)(((uint32_t)data) + 0x1ffe);
124	112	}
125	113	clean_dcache();
Index: embios/trunk/target/ipodnano4g/s5l8720.h
—	—	@@ -359,6 +359,13 @@
360	360
361	361
362	362	/////DMA/////
	363	+struct dma_lli
	364	+{
	365	+ void* srcaddr;
	366	+ void* dstaddr;
	367	+ const struct dma_lli* nextlli;
	368	+ uint32_t control;
	369	+};
363	370	#define DMACINTSTS(d) (((uint32_t volatile)(0x38200000 + 0x1700000 * (d))))
364	371	#define DMACINTTCSTS(d) (((uint32_t volatile)(0x38200004 + 0x1700000 * (d))))
365	372	#define DMACINTTCCLR(d) (((uint32_t volatile)(0x38200008 + 0x1700000 * (d))))
—	—	@@ -373,9 +380,10 @@
374	381	#define DMACSOFTLSREQ(d) (((uint32_t volatile)(0x3820002c + 0x1700000 * (d))))
375	382	#define DMACCONFIG(d) (((uint32_t volatile)(0x38200030 + 0x1700000 * (d))))
376	383	#define DMACSYNC(d) (((uint32_t volatile)(0x38200034 + 0x1700000 * (d))))
	384	+#define DMACCLLI(d, c) (((struct dma_lli volatile)(0x38200100 + 0x1700000 * (d) + 0x20 * (c))))
377	385	#define DMACCSRCADDR(d, c) (((const void volatile)(0x38200100 + 0x1700000 (d) + 0x20 * (c))))
378	386	#define DMACCDESTADDR(d, c) (((void volatile)(0x38200104 + 0x1700000 (d) + 0x20 * (c))))
379		~~-#define DMACCLLI(d, c) (((const void volatile)(0x38200108 + 0x1700000 (d) + 0x20 * (c))))~~
	387	+#define DMACCNEXTLLI(d, c) (((const void volatile)(0x38200108 + 0x1700000 (d) + 0x20 * (c))))
380	388	#define DMACCCONTROL(d, c) (((uint32_t volatile)(0x3820010c + 0x1700000 * (d) + 0x20 * (c))))
381	389	#define DMACCCONFIG(d, c) (((uint32_t volatile)(0x38200110 + 0x1700000 * (d) + 0x20 * (c))))
382	390	#define DMAC0INTSTS (((uint32_t volatile)(0x38200000)))
—	—	@@ -392,49 +400,58 @@
393	401	#define DMAC0SOFTLSREQ (((uint32_t volatile)(0x3820002c)))
394	402	#define DMAC0CONFIG (((uint32_t volatile)(0x38200030)))
395	403	#define DMAC0SYNC (((uint32_t volatile)(0x38200034)))
	404	+#define DMAC0CLLI(c) (((struct dma_lli volatile)(0x38200100 + 0x20 * (c))))
396	405	#define DMAC0CSRCADDR(c) (((const void volatile)(0x38200100 + 0x20 (c))))
397	406	#define DMAC0CDESTADDR(c) (((void volatile)(0x38200104 + 0x20 (c))))
398		~~-#define DMAC0CLLI(c) (((const void volatile)(0x38200108 + 0x20 (c))))~~
	407	+#define DMAC0CNEXTLLI(c) (((const void volatile)(0x38200108 + 0x20 (c))))
399	408	#define DMAC0CCONTROL(c) (((uint32_t volatile)(0x3820010c + 0x20 * (c))))
400	409	#define DMAC0CCONFIG(c) (((uint32_t volatile)(0x38200110 + 0x20 * (c))))
	410	+#define DMAC0C0LLI (((struct dma_lli volatile)(0x38200100)))
401	411	#define DMAC0C0SRCADDR (((const void volatile*)(0x38200100)))
402	412	#define DMAC0C0DESTADDR (((void volatile*)(0x38200104)))
403		~~-#define DMAC0C0LLI (((const void volatile*)(0x38200108)))~~
	413	+#define DMAC0C0NEXTLLI (((const struct dma_lli volatile*)(0x38200108)))
404	414	#define DMAC0C0CONTROL (((uint32_t volatile)(0x3820010c)))
405	415	#define DMAC0C0CONFIG (((uint32_t volatile)(0x38200110)))
	416	+#define DMAC0C1LLI (((struct dma_lli volatile)(0x38200120)))
406	417	#define DMAC0C1SRCADDR (((const void volatile*)(0x38200120)))
407	418	#define DMAC0C1DESTADDR (((void volatile*)(0x38200124)))
408		~~-#define DMAC0C1LLI (((const void volatile*)(0x38200128)))~~
	419	+#define DMAC0C1NEXTLLI (((const struct dma_lli volatile*)(0x38200128)))
409	420	#define DMAC0C1CONTROL (((uint32_t volatile)(0x3820012c)))
410	421	#define DMAC0C1CONFIG (((uint32_t volatile)(0x38200130)))
	422	+#define DMAC0C2LLI (((struct dma_lli volatile)(0x38200140)))
411	423	#define DMAC0C2SRCADDR (((const void volatile*)(0x38200140)))
412	424	#define DMAC0C2DESTADDR (((void volatile*)(0x38200144)))
413		~~-#define DMAC0C2LLI (((const void volatile*)(0x38200148)))~~
	425	+#define DMAC0C2NEXTLLI (((const struct dma_lli volatile*)(0x38200148)))
414	426	#define DMAC0C2CONTROL (((uint32_t volatile)(0x3820014c)))
415	427	#define DMAC0C2CONFIG (((uint32_t volatile)(0x38200150)))
	428	+#define DMAC0C3LLI (((struct dma_lli volatile)(0x38200160)))
416	429	#define DMAC0C3SRCADDR (((const void volatile*)(0x38200160)))
417	430	#define DMAC0C3DESTADDR (((void volatile*)(0x38200164)))
418		~~-#define DMAC0C3LLI (((const void volatile*)(0x38200168)))~~
	431	+#define DMAC0C3NEXTLLI (((const struct dma_lli volatile*)(0x38200168)))
419	432	#define DMAC0C3CONTROL (((uint32_t volatile)(0x3820016c)))
420	433	#define DMAC0C3CONFIG (((uint32_t volatile)(0x38200170)))
	434	+#define DMAC0C4LLI (((struct dma_lli volatile)(0x38200180)))
421	435	#define DMAC0C4SRCADDR (((const void volatile*)(0x38200180)))
422	436	#define DMAC0C4DESTADDR (((void volatile*)(0x38200184)))
423		~~-#define DMAC0C4LLI (((const void volatile*)(0x38200188)))~~
	437	+#define DMAC0C4NEXTLLI (((const struct dma_lli volatile*)(0x38200188)))
424	438	#define DMAC0C4CONTROL (((uint32_t volatile)(0x3820018c)))
425	439	#define DMAC0C4CONFIG (((uint32_t volatile)(0x38200190)))
	440	+#define DMAC0C5LLI (((struct dma_lli volatile)(0x382001a0)))
426	441	#define DMAC0C5SRCADDR (((const void volatile*)(0x382001a0)))
427	442	#define DMAC0C5DESTADDR (((void volatile*)(0x382001a4)))
428		~~-#define DMAC0C5LLI (((const void volatile*)(0x382001a8)))~~
	443	+#define DMAC0C5NEXTLLI (((const struct dma_lli volatile*)(0x382001a8)))
429	444	#define DMAC0C5CONTROL (((uint32_t volatile)(0x382001ac)))
430	445	#define DMAC0C5CONFIG (((uint32_t volatile)(0x382001b0)))
	446	+#define DMAC0C6LLI (((struct dma_lli volatile)(0x382001c0)))
431	447	#define DMAC0C6SRCADDR (((const void volatile*)(0x382001c0)))
432	448	#define DMAC0C6DESTADDR (((void volatile*)(0x382001c4)))
433		~~-#define DMAC0C6LLI (((const void volatile*)(0x382001c8)))~~
	449	+#define DMAC0C6NEXTLLI (((const struct dma_lli volatile*)(0x382001c8)))
434	450	#define DMAC0C6CONTROL (((uint32_t volatile)(0x382001cc)))
435	451	#define DMAC0C6CONFIG (((uint32_t volatile)(0x382001d0)))
	452	+#define DMAC0C7LLI (((struct dma_lli volatile)(0x382001e0)))
436	453	#define DMAC0C7SRCADDR (((const void volatile*)(0x382001e0)))
437	454	#define DMAC0C7DESTADDR (((void volatile*)(0x382001e4)))
438		~~-#define DMAC0C7LLI (((const void volatile*)(0x382001e8)))~~
	455	+#define DMAC0C7NEXTLLI (((const struct dma_lli volatile*)(0x382001e8)))
439	456	#define DMAC0C7CONTROL (((uint32_t volatile)(0x382001ec)))
440	457	#define DMAC0C7CONFIG (((uint32_t volatile)(0x382001f0)))
441	458	#define DMAC1INTSTS (((uint32_t volatile)(0x39900000)))
—	—	@@ -451,49 +468,58 @@
452	469	#define DMAC1SOFTLSREQ (((uint32_t volatile)(0x3990002c)))
453	470	#define DMAC1CONFIG (((uint32_t volatile)(0x39900030)))
454	471	#define DMAC1SYNC (((uint32_t volatile)(0x39900034)))
	472	+#define DMAC1CLLI(c) (((struct dma_lli volatile)(0x39900100 + 0x20 * (c))))
455	473	#define DMAC1CSRCADDR(c) (((const void volatile)(0x39900100 + 0x20 (c))))
456	474	#define DMAC1CDESTADDR(c) (((void volatile)(0x39900104 + 0x20 (c))))
457		~~-#define DMAC1CLLI(c) (((const void volatile)(0x39900108 + 0x20 (c))))~~
	475	+#define DMAC1CNEXTLLI(c) (((const void volatile)(0x39900108 + 0x20 (c))))
458	476	#define DMAC1CCONTROL(c) (((uint32_t volatile)(0x3990010c + 0x20 * (c))))
459	477	#define DMAC1CCONFIG(c) (((uint32_t volatile)(0x39900110 + 0x20 * (c))))
	478	+#define DMAC1C0LLI (((struct dma_lli volatile)(0x39900100)))
460	479	#define DMAC1C0SRCADDR (((const void volatile*)(0x39900100)))
461	480	#define DMAC1C0DESTADDR (((void volatile*)(0x39900104)))
462		~~-#define DMAC1C0LLI (((const void volatile*)(0x39900108)))~~
	481	+#define DMAC1C0NEXTLLI (((const struct dma_lli volatile*)(0x39900108)))
463	482	#define DMAC1C0CONTROL (((uint32_t volatile)(0x3990010c)))
464	483	#define DMAC1C0CONFIG (((uint32_t volatile)(0x39900110)))
	484	+#define DMAC1C1LLI (((struct dma_lli volatile)(0x39900120)))
465	485	#define DMAC1C1SRCADDR (((const void volatile*)(0x39900120)))
466	486	#define DMAC1C1DESTADDR (((void volatile*)(0x39900124)))
467		~~-#define DMAC1C1LLI (((const void volatile*)(0x39900128)))~~
	487	+#define DMAC1C1NEXTLLI (((const struct dma_lli volatile*)(0x39900128)))
468	488	#define DMAC1C1CONTROL (((uint32_t volatile)(0x3990012c)))
469	489	#define DMAC1C1CONFIG (((uint32_t volatile)(0x39900130)))
	490	+#define DMAC1C2LLI (((struct dma_lli volatile)(0x39900140)))
470	491	#define DMAC1C2SRCADDR (((const void volatile*)(0x39900140)))
471	492	#define DMAC1C2DESTADDR (((void volatile*)(0x39900144)))
472		~~-#define DMAC1C2LLI (((const void volatile*)(0x39900148)))~~
	493	+#define DMAC1C2NEXTLLI (((const struct dma_lli volatile*)(0x39900148)))
473	494	#define DMAC1C2CONTROL (((uint32_t volatile)(0x3990014c)))
474	495	#define DMAC1C2CONFIG (((uint32_t volatile)(0x39900150)))
	496	+#define DMAC1C3LLI (((struct dma_lli volatile)(0x39900160)))
475	497	#define DMAC1C3SRCADDR (((const void volatile*)(0x39900160)))
476	498	#define DMAC1C3DESTADDR (((void volatile*)(0x39900164)))
477		~~-#define DMAC1C3LLI (((volatile vvoid*)(0x39900168)))~~
	499	+#define DMAC1C3NEXTLLI (((volatile void*)(0x39900168)))
478	500	#define DMAC1C3CONTROL (((uint32_t volatile)(0x3990016c)))
479	501	#define DMAC1C3CONFIG (((uint32_t volatile)(0x39900170)))
	502	+#define DMAC1C4LLI (((struct dma_lli volatile)(0x39900180)))
480	503	#define DMAC1C4SRCADDR (((const void volatile*)(0x39900180)))
481	504	#define DMAC1C4DESTADDR (((void volatile*)(0x39900184)))
482		~~-#define DMAC1C4LLI (((const void volatile*)(0x39900188)))~~
	505	+#define DMAC1C4NEXTLLI (((const struct dma_lli volatile*)(0x39900188)))
483	506	#define DMAC1C4CONTROL (((uint32_t volatile)(0x3990018c)))
484	507	#define DMAC1C4CONFIG (((uint32_t volatile)(0x39900190)))
	508	+#define DMAC1C5LLI (((struct dma_lli volatile)(0x399001a0)))
485	509	#define DMAC1C5SRCADDR (((const void volatile*)(0x399001a0)))
486	510	#define DMAC1C5DESTADDR (((void volatile*)(0x399001a4)))
487		~~-#define DMAC1C5LLI (((const void volatile*)(0x399001a8)))~~
	511	+#define DMAC1C5NEXTLLI (((const struct dma_lli volatile*)(0x399001a8)))
488	512	#define DMAC1C5CONTROL (((uint32_t volatile)(0x399001ac)))
489	513	#define DMAC1C5CONFIG (((uint32_t volatile)(0x399001b0)))
	514	+#define DMAC1C6LLI (((struct dma_lli volatile)(0x399001c0)))
490	515	#define DMAC1C6SRCADDR (((const void volatile*)(0x399001c0)))
491	516	#define DMAC1C6DESTADDR (((void volatile*)(0x399001c4)))
492		~~-#define DMAC1C6LLI (((const void volatile*)(0x399001c8)))~~
	517	+#define DMAC1C6NEXTLLI (((const struct dma_lli volatile*)(0x399001c8)))
493	518	#define DMAC1C6CONTROL (((uint32_t volatile)(0x399001cc)))
494	519	#define DMAC1C6CONFIG (((uint32_t volatile)(0x399001d0)))
	520	+#define DMAC1C7LLI (((struct dma_lli volatile)(0x399001e0)))
495	521	#define DMAC1C7SRCADDR (((const void volatile*)(0x399001e0)))
496	522	#define DMAC1C7DESTADDR (((void volatile*)(0x399001e4)))
497		~~-#define DMAC1C7LLI (((const void volatile*)(0x399001e8)))~~
	523	+#define DMAC1C7NEXTLLI (((const struct dma_lli volatile*)(0x399001e8)))
498	524	#define DMAC1C7CONTROL (((uint32_t volatile)(0x399001ec)))
499	525	#define DMAC1C7CONFIG (((uint32_t volatile)(0x399001f0)))
500	526

freemyipod r278 - Code Review

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