| Index: emcore/trunk/target/ipodnano2g/hwkeyaes.c |
| — | — | @@ -58,12 +58,11 @@ |
| 59 | 59 | AESOUTADDR = (void*)((uint32_t)data + (ptr << 2));
|
| 60 | 60 | AESINADDR = (void*)((uint32_t)data + (ptr << 2));
|
| 61 | 61 | AESAUXADDR = (void*)((uint32_t)data + (ptr << 2));
|
| 62 | | - clean_dcache();
|
| | 62 | + invalidate_dcache();
|
| 63 | 63 | AESSTATUS = 6;
|
| 64 | 64 | AESGO = go;
|
| 65 | 65 | go = 3;
|
| 66 | 66 | while ((AESSTATUS & 6) == 0);
|
| 67 | | - invalidate_dcache();
|
| 68 | 67 | if (direction == HWKEYAES_DECRYPT)
|
| 69 | 68 | {
|
| 70 | 69 | if (!ptr) break;
|
| Index: emcore/trunk/target/ipodnano2g/nand.c |
| — | — | @@ -226,7 +226,8 @@ |
| 227 | 227 | DMACOM3 = DMACOM_CLEARBOTHDONE;
|
| 228 | 228 | DMABASE3 = buffer;
|
| 229 | 229 | DMATCNT3 = (size >> 4) - 1;
|
| 230 | | - clean_dcache();
|
| | 230 | + if (direction) clean_dcache();
|
| | 231 | + else invalidate_dcache();
|
| 231 | 232 | DMACOM3 = 4;
|
| 232 | 233 | }
|
| 233 | 234 |
|
| — | — | @@ -235,7 +236,6 @@ |
| 236 | 237 | uint32_t timeout = USEC_TIMER + 20000;
|
| 237 | 238 | while (DMAALLST & DMAALLST_DMABUSY3)
|
| 238 | 239 | if (nand_timeout(timeout)) return 1;
|
| 239 | | - if (!direction) invalidate_dcache();
|
| 240 | 240 | if (nand_wait_addrdone()) return 1;
|
| 241 | 241 | if (!direction) FMCTRL1 = FMCTRL1_CLEARRFIFO | FMCTRL1_CLEARWFIFO;
|
| 242 | 242 | else FMCTRL1 = FMCTRL1_CLEARRFIFO;
|
| — | — | @@ -259,7 +259,7 @@ |
| 260 | 260 | ECC_UNK1 = size;
|
| 261 | 261 | ECC_DATA_PTR = databuffer;
|
| 262 | 262 | ECC_SPARE_PTR = sparebuffer;
|
| 263 | | - clean_dcache();
|
| | 263 | + invalidate_dcache();
|
| 264 | 264 | ECC_CTRL = type;
|
| 265 | 265 | }
|
| 266 | 266 |
|
| — | — | @@ -268,7 +268,6 @@ |
| 269 | 269 | uint32_t timeout = USEC_TIMER + 20000;
|
| 270 | 270 | while (!(SRCPND & (1 << IRQ_ECC)))
|
| 271 | 271 | if (nand_timeout(timeout)) return ecc_unlock(1);
|
| 272 | | - invalidate_dcache();
|
| 273 | 272 | ECC_INT_CLR = 1;
|
| 274 | 273 | SRCPND = (1 << IRQ_ECC);
|
| 275 | 274 | return ecc_unlock(ECC_RESULT);
|
| Index: emcore/trunk/target/ipodnano3g/hwkeyaes.c |
| — | — | @@ -51,9 +51,8 @@ |
| 52 | 52 | AESAUXSIZE = size;
|
| 53 | 53 | AESAUXADDR = data;
|
| 54 | 54 | AESSIZE3 = size;
|
| 55 | | - clean_dcache();
|
| | 55 | + invalidate_dcache();
|
| 56 | 56 | AESGO = 1;
|
| 57 | | - invalidate_dcache();
|
| 58 | 57 | while (!(AESSTATUS & 0xf)) sleep(MIN(10000, size >> 4));
|
| 59 | 58 | clockgate_enable(10, false);
|
| 60 | 59 | mutex_unlock(&hwkeyaes_mutex);
|
| Index: emcore/trunk/target/ipodnano3g/spi.c |
| — | — | @@ -94,11 +94,10 @@ |
| 95 | 95 | nextlli = lli;
|
| 96 | 96 | lli = &lli[-1];
|
| 97 | 97 | }
|
| 98 | | - clean_dcache();
|
| | 98 | + invalidate_dcache();
|
| 99 | 99 | DMAC0CCONFIG(port + 5) = 0x9001 | (SPIDMA(port) << 1);
|
| 100 | 100 | wakeup_wait(&spiwakeup[port], TIMEOUT_BLOCK);
|
| 101 | 101 | clockgate_dma(0, port + 5, false);
|
| 102 | | - invalidate_dcache();
|
| 103 | 102 | SPISETUP(port) &= ~0x41;
|
| 104 | 103 | }
|
| 105 | 104 |
|
| Index: emcore/trunk/target/ipodclassic/storage_ata.c |
| — | — | @@ -41,7 +41,7 @@ |
| 42 | 42 |
|
| 43 | 43 | /** static, private data **/
|
| 44 | 44 | static uint8_t ceata_taskfile[16] __attribute__((aligned(16)));
|
| 45 | | -uint16_t ata_identify_data[0x100];
|
| | 45 | +uint16_t ata_identify_data[0x100] __attribute__((aligned(16)));
|
| 46 | 46 | bool ceata;
|
| 47 | 47 | bool ata_lba48;
|
| 48 | 48 | bool ata_dma;
|
| — | — | @@ -343,6 +343,7 @@ |
| 344 | 344 | SDCI_DMACOUNT = 1;
|
| 345 | 345 | SDCI_DMAADDR = dest;
|
| 346 | 346 | SDCI_DCTRL = SDCI_DCTRL_TXFIFORST | SDCI_DCTRL_RXFIFORST;
|
| | 347 | + invalidate_dcache();
|
| 347 | 348 | PASS_RC(mmc_send_command(SDCI_CMD_CMD_NUM(MMC_CMD_CEATA_RW_MULTIPLE_REG)
|
| 348 | 349 | | SDCI_CMD_CMD_TYPE_ADTC | SDCI_CMD_RES_TYPE_R1
|
| 349 | 350 | | SDCI_CMD_RES_SIZE_48 | SDCI_CMD_NCR_NID_NCR,
|
| — | — | @@ -352,7 +353,6 @@ |
| 353 | 354 | NULL, CEATA_COMMAND_TIMEOUT), 2, 1);
|
| 354 | 355 | long startusec = USEC_TIMER;
|
| 355 | 356 | if (wakeup_wait(&mmc_wakeup, CEATA_COMMAND_TIMEOUT) == THREAD_TIMEOUT) RET_ERR(2);
|
| 356 | | - invalidate_dcache();
|
| 357 | 357 | PASS_RC(mmc_dsta_check_data_success(), 2, 3);
|
| 358 | 358 | return 0;
|
| 359 | 359 | }
|
| — | — | @@ -472,7 +472,6 @@ |
| 473 | 473 | uint32_t direction;
|
| 474 | 474 | if (write)
|
| 475 | 475 | {
|
| 476 | | - clean_dcache();
|
| 477 | 476 | cmdtype = SDCI_CMD_CMD_TYPE_ADTC | SDCI_CMD_CMD_RD_WR;
|
| 478 | 477 | responsetype = SDCI_CMD_RES_TYPE_R1 | SDCI_CMD_RES_BUSY;
|
| 479 | 478 | direction = MMC_CMD_CEATA_RW_MULTIPLE_BLOCK_DIRECTION_WRITE;
|
| — | — | @@ -487,6 +486,7 @@ |
| 488 | 487 | SDCI_DMAADDR = buf;
|
| 489 | 488 | SDCI_DMACOUNT = count;
|
| 490 | 489 | SDCI_DCTRL = SDCI_DCTRL_TXFIFORST | SDCI_DCTRL_RXFIFORST;
|
| | 490 | + invalidate_dcache();
|
| 491 | 491 | PASS_RC(mmc_send_command(SDCI_CMD_CMD_NUM(MMC_CMD_CEATA_RW_MULTIPLE_BLOCK)
|
| 492 | 492 | | SDCI_CMD_CMD_TYPE_ADTC | cmdtype | responsetype
|
| 493 | 493 | | SDCI_CMD_RES_SIZE_48 | SDCI_CMD_NCR_NID_NCR,
|
| — | — | @@ -498,7 +498,6 @@ |
| 499 | 499 | PASS_RC(ceata_cancel_command(), 4, 1);
|
| 500 | 500 | RET_ERR(2);
|
| 501 | 501 | }
|
| 502 | | - if (!write) invalidate_dcache();
|
| 503 | 502 | PASS_RC(mmc_dsta_check_data_success(), 4, 3);
|
| 504 | 503 | if (wakeup_wait(&mmc_comp_wakeup, timeout) == THREAD_TIMEOUT)
|
| 505 | 504 | {
|
| — | — | @@ -519,11 +518,6 @@ |
| 520 | 519 | PASS_RC(ceata_wait_idle(), 2, 0);
|
| 521 | 520 | PASS_RC(ceata_write_multiple_register(0, ceata_taskfile, 16), 2, 1);
|
| 522 | 521 | PASS_RC(ceata_rw_multiple_block(false, buf, 1, CEATA_COMMAND_TIMEOUT), 2, 2);
|
| 523 | | - for (i = 0; i < 0x100; i++)
|
| 524 | | - {
|
| 525 | | - uint16_t word = buf[i];
|
| 526 | | - buf[i] = (word >> 8) | (word << 8);
|
| 527 | | - }
|
| 528 | 522 | }
|
| 529 | 523 | else
|
| 530 | 524 | {
|
| Index: emcore/trunk/usb/synopsysotg.c |
| — | — | @@ -192,7 +192,6 @@ |
| 193 | 193 | {
|
| 194 | 194 | if (epints & 1) /* Transfer completed */
|
| 195 | 195 | {
|
| 196 | | - invalidate_dcache();
|
| 197 | 196 | int bytes = endpoints[i].size - (DIEPTSIZ(i) & 0x3FFFF);
|
| 198 | 197 | if (endpoints[i].busy)
|
| 199 | 198 | {
|
| — | — | @@ -224,7 +223,6 @@ |
| 225 | 224 | {
|
| 226 | 225 | if (epints & 1) /* Transfer completed */
|
| 227 | 226 | {
|
| 228 | | - invalidate_dcache();
|
| 229 | 227 | int bytes = endpoints[i].size - (DOEPTSIZ(i) & 0x3FFFF);
|
| 230 | 228 | if (endpoints[i].busy)
|
| 231 | 229 | {
|
| — | — | @@ -300,7 +298,7 @@ |
| 301 | 299 | DOEPTSIZ(ep) = length | (packets << 19);
|
| 302 | 300 | DOEPDMA(ep) = ptr;
|
| 303 | 301 | }
|
| 304 | | - clean_dcache();
|
| | 302 | + invalidate_dcache();
|
| 305 | 303 | DOEPCTL(ep) |= 0x84000000; /* EPx OUT ENABLE CLEARNAK */
|
| 306 | 304 | }
|
| 307 | 305 |
|
