USB OTG features
Nano2G:
Connected to emCORE Debugger v0.2.2 r836 running on iPod nano 2g 38800040: 00000264 228DD9D0 050004E8 | d... ..."....| 38800050: 01F08001 |.... | Device Mode IN Token Sequence Learning Queue Depth: 16 Host Mode Periodic Request Queue Depth: 8 Non-Periodic Request Queue Depth: 8 Dynamic FIFO Sizing Enabled: Yes Periodic OUT Channels Supported in Host Mode: Yes Number of Host Channels: 8 (Indicates the number of host channels supported by the core in Host mode) Number of Device Endpoints: 6(Indicates the number of device endpoints supported by the core in Device mode in addition to control endpoint 0) Full-Speed PHY Interface Type: Dedicated full-speed interface High-Speed PHY Interface Type: UTMI+ and ULPI Point-to-Point: Multi-point application Architecture: Internal DMA Mode of Operation: HNP- and SRP-Capable OTG (Host & Device) Endpoints: 0 (BIDI), 1 (IN), 2 (OUT), 3 (IN), 4 (OUT), 5 (BIDI), 6 (BIDI) DFIFO Depth: 1280 (This value is in terms of 32-bit words => 5120 bytes) AHB and PHY Synchronous: No (Indicates whether AHB and PHY clocks are synchronous to each other) Reset Style for Clocked always Blocks in RTL: Asynchronous reset is used in the core Optional Features Removed: Yes (Indicates whether the User ID register, GPIO interface ports, and SOF toggle and counter ports were removed for gate count optimization) Vendor Control Interface Support: Vendor Control Interface is not available on the core I2C Selection: I2C Interface is not available on the core OTG Function Enabled: OTG Capable (The application uses this bit to indicate the O2P USB core's OTG capabilities) Width of Packet Size Counters: 10 bits Width of Transfer Size Counters: 19 bits Number of IN endpoints: 0 (?) Enable dedicated transmit FIFO for device IN endpoints: No session_end Filter Enabled: Yes b_valid Filter Enabled: Yes a_valid Filter Enabled: Yes vbus_valid Filter Enabled: Yes iddig Filter Enabled: Yes Number of Device Mode Control Endpoints in Addition to Endpoint 0: 0 UTMI+ PHY/ULPI-to-Internal UTMI+ Wrapper Data Width: 8/16 bits, software selectable (When a ULPI PHY is used, an internal wrapper converts ULPI to UTMI+) Minimum AHB Frequency Less Than 60 MHz: No Enable Power Optimization: No Number of Device Mode Periodic IN Endpoints: 1
Classic:
Connected to emCORE Debugger v0.2.2 r836 running on iPod classic 38400040: 00000264 228F60D0 082000E8 | d... .`.".. .| 38400050: 1BF08030 |0... | Device Mode IN Token Sequence Learning Queue Depth: 16 Host Mode Periodic Request Queue Depth: 8 Non-Periodic Request Queue Depth: 8 Dynamic FIFO Sizing Enabled: Yes Periodic OUT Channels Supported in Host Mode: Yes Number of Host Channels: 14 (Indicates the number of host channels supported by the core in Host mode) Number of Device Endpoints: 8 (Indicates the number of device endpoints supported by the core in Device mode in addition to control endpoint 0) Full-Speed PHY Interface Type: Full-speed interface not supported High-Speed PHY Interface Type: UTMI+ and ULPI Point-to-Point: Multi-point application Architecture: Internal DMA Mode of Operation: HNP- and SRP-Capable OTG (Host & Device) Endpoints: 0 (BIDI), 1 (IN), 2 (OUT), 3 (IN), 4 (OUT), 5 (BIDI), 6 (BIDI), 7 (BIDI), 8 (BIDI) DFIFO Depth: 2080 (This value is in terms of 32-bit words => 8320 bytes) AHB and PHY Synchronous: No (Indicates whether AHB and PHY clocks are synchronous to each other) Reset Style for Clocked always Blocks in RTL: Asynchronous reset is used in the core Optional Features Removed: No (Indicates whether the User ID register, GPIO interface ports, and SOF toggle and counter ports were removed for gate count optimization) Vendor Control Interface Support: Vendor Control Interface is not available on the core I2C Selection: I2C Interface is not available on the core OTG Function Enabled: OTG Capable (The application uses this bit to indicate the O2P USB core's OTG capabilities) Width of Packet Size Counters: 10 bits Width of Transfer Size Counters: 19 bits Number of IN endpoints: 5 (?) Enable dedicated transmit FIFO for device IN endpoints: Yes session_end Filter Enabled: Yes b_valid Filter Enabled: Yes a_valid Filter Enabled: Yes vbus_valid Filter Enabled: Yes iddig Filter Enabled: Yes Number of Device Mode Control Endpoints in Addition to Endpoint 0: 0 UTMI+ PHY/ULPI-to-Internal UTMI+ Wrapper Data Width: 8/16 bits, software selectable (When a ULPI PHY is used, an internal wrapper converts ULPI to UTMI+) Minimum AHB Frequency Less Than 60 MHz: Yes Enable Power Optimization: Yes Number of Device Mode Periodic IN Endpoints: 0
