Difference between revisions of "Nano 3G/Memory Map"

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! Address !! Description !! Notes
 
! Address !! Description !! Notes
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| <tt>0x3C800000<br />0x3C800004</tt> || WDTCON<br />WDTCNT || Watchdog timer<ref name="datasheet" />
 
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|-
 
|}
 
|}
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<references>
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<ref name="datasheet">See [[S5L8700 datasheet]]</ref>
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</references>

Revision as of 13:18, 30 November 2010

Address Description Notes
0xFFFF FFFF - 0x4000 0000
0x3FFF FFFF - 0x3800 0000 I/O Area See table below
0x37FF FFFF - 0x2204 0000
0x2203 FFFF - 0x2200 0000 On-chip SRAM Always accessible
0x21FF FFFF - 0x2000 C800
0x2000 C7FF - 0x2000 0000 Boot ROM Executed by processor at start up
0x1FFF FFFF - 0x0C00 0000
0x0BFF FFFF - 0x0A00 0000 SDRAM Mirror 2 Same contents as mirror 1
0x09FF FFFF - 0x0800 0000 SDRAM Mirror 1 Needs initialization
0x07FF FFFF - 0x0000 0000

IO Map

Address Description Notes
0x3C800000
0x3C800004
WDTCON
WDTCNT
Watchdog timer[1]