Difference between revisions of "S5L8702"
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Revision as of 23:53, 11 September 2023
Contents
Introduction
This page provides details on the Samsung S5L8702 System on Chip (SoC).
Peripherals
An overview of the peripherals of the SoC, describing the base address and registers for each one.
SPI
| SPI | Base address |
|---|---|
| SPI0 | 0x3c300000 |
| SPI1 | 0x3ce00000 |
| SPI2 | 0x3d200000 |
Registers
| Register Name | Offset | Description | Note |
|---|---|---|---|
| SPICTRL | 0x00 | ||
| SPISETUP | 0x04 | ||
| SPISTATUS | 0x08 | ||
| SPIPIN | 0x0c | ||
| SPITXDATA | 0x10 | ||
| SPIRXDATA | 0x20 | ||
| SPICLKDIV | 0x30 | ||
| SPIRXLIMIT | 0x34 |
SPICTRL
| Name | Bit | Type | Description | Note |
|---|---|---|---|---|
| Unk2 | 1 | R/W? | Gets checked by the bootloader after clearing/setting Unk1 | |
| Unk1 | 0 | R?/W | Gets cleared/set by the bootloader |
SPISETUP
| Name | Bit | Type | Description | Note |
|---|---|---|---|---|
| RW | 0 | R?/W | Set to 1 for RX, 0 for TX |
SPISTATUS
| Name | Bit | Type | Description | Note |
|---|
SPIPIN
| Name | Bit | Type | Description | Note |
|---|
SPITXDATA
| Name | Bit | Type | Description | Note |
|---|---|---|---|---|
| DATA | 7:0 | R?/W | Data to be sent by the SPI peripheral |
SPIRXDATA
| Name | Bit | Type | Description | Note |
|---|---|---|---|---|
| DATA | 7:0 | R/W? | Data received by the SPI peripheral |
SPICLKDIV
| Name | Bit | Type | Description | Note |
|---|---|---|---|---|
| CLKDIV | 10:0 | R?/W |
SPIRXLIMIT
| Name | Bit | Type | Description | Note |
|---|
