| Index: emcore/trunk/target/ipodnano2g/s5l8701.h |
| — | — | @@ -1,313 +1,313 @@ |
| 2 | | -//
|
| 3 | | -//
|
| 4 | | -// Copyright 2010 TheSeven
|
| 5 | | -//
|
| 6 | | -//
|
| 7 | | -// This file is part of emCORE.
|
| 8 | | -//
|
| 9 | | -// emCORE is free software: you can redistribute it and/or
|
| 10 | | -// modify it under the terms of the GNU General Public License as
|
| 11 | | -// published by the Free Software Foundation, either version 2 of the
|
| 12 | | -// License, or (at your option) any later version.
|
| 13 | | -//
|
| 14 | | -// emCORE is distributed in the hope that it will be useful,
|
| 15 | | -// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
| 16 | | -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
| 17 | | -// See the GNU General Public License for more details.
|
| 18 | | -//
|
| 19 | | -// You should have received a copy of the GNU General Public License along
|
| 20 | | -// with emCORE. If not, see <http://www.gnu.org/licenses/>.
|
| 21 | | -//
|
| 22 | | -//
|
| 23 | | -
|
| 24 | | -
|
| 25 | | -#ifndef __S5L8701_H__
|
| 26 | | -#define __S5L8701_H__
|
| 27 | | -
|
| 28 | | -#include "global.h"
|
| 29 | | -
|
| 30 | | -
|
| 31 | | -/////CLKCON/////
|
| 32 | | -#define CLKCON (*((uint32_t volatile*)(0x3C500000)))
|
| 33 | | -#define PLL0PMS (*((uint32_t volatile*)(0x3C500004)))
|
| 34 | | -#define PLL1PMS (*((uint32_t volatile*)(0x3C500008)))
|
| 35 | | -#define PLL2PMS (*((uint32_t volatile*)(0x3C50000C)))
|
| 36 | | -#define PLL0LCNT (*((uint32_t volatile*)(0x3C500014)))
|
| 37 | | -#define PLL1LCNT (*((uint32_t volatile*)(0x3C500018)))
|
| 38 | | -#define PLL2LCNT (*((uint32_t volatile*)(0x3C50001C)))
|
| 39 | | -#define PLLLOCK (*((uint32_t volatile*)(0x3C500020)))
|
| 40 | | -#define PLLCON (*((uint32_t volatile*)(0x3C500024)))
|
| 41 | | -#define PWRMODE (*((uint32_t volatile*)(0x3C50002C)))
|
| 42 | | -#define SWRCON (*((uint32_t volatile*)(0x3C500030)))
|
| 43 | | -#define RSTSR (*((uint32_t volatile*)(0x3C500034)))
|
| 44 | | -#define DSPCLKMD (*((uint32_t volatile*)(0x3C500038)))
|
| 45 | | -#define CLKCON2 (*((uint32_t volatile*)(0x3C50003C)))
|
| 46 | | -#define PWRCON(i) (*((uint32_t volatile*)(0x3C500000 + ((i) == 1 ? 0x40 : 0x28))))
|
| 47 | | -
|
| 48 | | -
|
| 49 | | -/////ICU/////
|
| 50 | | -#define SRCPND (*((uint32_t volatile*)(0x39C00000)))
|
| 51 | | -#define INTMOD (*((uint32_t volatile*)(0x39C00004)))
|
| 52 | | -#define INTMSK (*((uint32_t volatile*)(0x39C00008)))
|
| 53 | | -#define INTPRIO (*((uint32_t volatile*)(0x39C0000C)))
|
| 54 | | -#define INTPND (*((uint32_t volatile*)(0x39C00010)))
|
| 55 | | -#define INTOFFSET (*((uint32_t volatile*)(0x39C00014)))
|
| 56 | | -#define EINTPOL (*((uint32_t volatile*)(0x39C00018)))
|
| 57 | | -#define EINTPEND (*((uint32_t volatile*)(0x39C0001C)))
|
| 58 | | -#define EINTMSK (*((uint32_t volatile*)(0x39C00020)))
|
| 59 | | -
|
| 60 | | -
|
| 61 | | -/////GPIO/////
|
| 62 | | -#define PCON0 (*((uint32_t volatile*)(0x3CF00000)))
|
| 63 | | -#define PDAT0 (*((uint32_t volatile*)(0x3CF00004)))
|
| 64 | | -#define PCON1 (*((uint32_t volatile*)(0x3CF00010)))
|
| 65 | | -#define PDAT1 (*((uint32_t volatile*)(0x3CF00014)))
|
| 66 | | -#define PCON2 (*((uint32_t volatile*)(0x3CF00020)))
|
| 67 | | -#define PDAT2 (*((uint32_t volatile*)(0x3CF00024)))
|
| 68 | | -#define PCON3 (*((uint32_t volatile*)(0x3CF00030)))
|
| 69 | | -#define PDAT3 (*((uint32_t volatile*)(0x3CF00034)))
|
| 70 | | -#define PCON4 (*((uint32_t volatile*)(0x3CF00040)))
|
| 71 | | -#define PDAT4 (*((uint32_t volatile*)(0x3CF00044)))
|
| 72 | | -#define PCON5 (*((uint32_t volatile*)(0x3CF00050)))
|
| 73 | | -#define PDAT5 (*((uint32_t volatile*)(0x3CF00054)))
|
| 74 | | -#define PUNK5 (*((uint32_t volatile*)(0x3CF0005C)))
|
| 75 | | -#define PCON6 (*((uint32_t volatile*)(0x3CF00060)))
|
| 76 | | -#define PDAT6 (*((uint32_t volatile*)(0x3CF00064)))
|
| 77 | | -#define PCON7 (*((uint32_t volatile*)(0x3CF00070)))
|
| 78 | | -#define PDAT7 (*((uint32_t volatile*)(0x3CF00074)))
|
| 79 | | -#define PCON10 (*((uint32_t volatile*)(0x3CF000A0)))
|
| 80 | | -#define PDAT10 (*((uint32_t volatile*)(0x3CF000A4)))
|
| 81 | | -#define PCON11 (*((uint32_t volatile*)(0x3CF000B0)))
|
| 82 | | -#define PDAT11 (*((uint32_t volatile*)(0x3CF000B4)))
|
| 83 | | -#define PCON13 (*((uint32_t volatile*)(0x3CF000D0)))
|
| 84 | | -#define PDAT13 (*((uint32_t volatile*)(0x3CF000D4)))
|
| 85 | | -#define PCON14 (*((uint32_t volatile*)(0x3CF000E0)))
|
| 86 | | -#define PDAT14 (*((uint32_t volatile*)(0x3CF000E4)))
|
| 87 | | -#define PCON15 (*((uint32_t volatile*)(0x3CF000F0)))
|
| 88 | | -#define PUNK15 (*((uint32_t volatile*)(0x3CF000FC)))
|
| 89 | | -
|
| 90 | | -
|
| 91 | | -/////IODMA/////
|
| 92 | | -#define DMABASE0 (*((void* volatile*)(0x38400000)))
|
| 93 | | -#define DMACON0 (*((uint32_t volatile*)(0x38400004)))
|
| 94 | | -#define DMATCNT0 (*((uint32_t volatile*)(0x38400008)))
|
| 95 | | -#define DMACADDR0 (*((void* volatile*)(0x3840000C)))
|
| 96 | | -#define DMACTCNT0 (*((uint32_t volatile*)(0x38400010)))
|
| 97 | | -#define DMACOM0 (*((uint32_t volatile*)(0x38400014)))
|
| 98 | | -#define DMANOF0 (*((uint32_t volatile*)(0x38400018)))
|
| 99 | | -#define DMABASE1 (*((void* volatile*)(0x38400020)))
|
| 100 | | -#define DMACON1 (*((uint32_t volatile*)(0x38400024)))
|
| 101 | | -#define DMATCNT1 (*((uint32_t volatile*)(0x38400028)))
|
| 102 | | -#define DMACADDR1 (*((void* volatile*)(0x3840002C)))
|
| 103 | | -#define DMACTCNT1 (*((uint32_t volatile*)(0x38400030)))
|
| 104 | | -#define DMACOM1 (*((uint32_t volatile*)(0x38400034)))
|
| 105 | | -#define DMABASE2 (*((void* volatile*)(0x38400040)))
|
| 106 | | -#define DMACON2 (*((uint32_t volatile*)(0x38400044)))
|
| 107 | | -#define DMATCNT2 (*((uint32_t volatile*)(0x38400048)))
|
| 108 | | -#define DMACADDR2 (*((void* volatile*)(0x3840004C)))
|
| 109 | | -#define DMACTCNT2 (*((uint32_t volatile*)(0x38400050)))
|
| 110 | | -#define DMACOM2 (*((uint32_t volatile*)(0x38400054)))
|
| 111 | | -#define DMABASE3 (*((void* volatile*)(0x38400060)))
|
| 112 | | -#define DMACON3 (*((uint32_t volatile*)(0x38400064)))
|
| 113 | | -#define DMATCNT3 (*((uint32_t volatile*)(0x38400068)))
|
| 114 | | -#define DMACADDR3 (*((void* volatile*)(0x3840006C)))
|
| 115 | | -#define DMACTCNT3 (*((uint32_t volatile*)(0x38400070)))
|
| 116 | | -#define DMACOM3 (*((uint32_t volatile*)(0x38400074)))
|
| 117 | | -#define DMABASE4 (*((void* volatile*)(0x38400080)))
|
| 118 | | -#define DMACON4 (*((uint32_t volatile*)(0x38400084)))
|
| 119 | | -#define DMATCNT4 (*((uint32_t volatile*)(0x38400088)))
|
| 120 | | -#define DMACADDR4 (*((void* volatile*)(0x3840008C)))
|
| 121 | | -#define DMACTCNT4 (*((uint32_t volatile*)(0x38400090)))
|
| 122 | | -#define DMACOM4 (*((uint32_t volatile*)(0x38400094)))
|
| 123 | | -#define DMABASE5 (*((void* volatile*)(0x384000A0)))
|
| 124 | | -#define DMACON5 (*((uint32_t volatile*)(0x384000A4)))
|
| 125 | | -#define DMATCNT5 (*((uint32_t volatile*)(0x384000A8)))
|
| 126 | | -#define DMACADDR5 (*((void* volatile*)(0x384000AC)))
|
| 127 | | -#define DMACTCNT5 (*((uint32_t volatile*)(0x384000B0)))
|
| 128 | | -#define DMACOM5 (*((uint32_t volatile*)(0x384000B4)))
|
| 129 | | -#define DMABASE6 (*((void* volatile*)(0x384000C0)))
|
| 130 | | -#define DMACON6 (*((uint32_t volatile*)(0x384000C4)))
|
| 131 | | -#define DMATCNT6 (*((uint32_t volatile*)(0x384000C8)))
|
| 132 | | -#define DMACADDR6 (*((void* volatile*)(0x384000CC)))
|
| 133 | | -#define DMACTCNT6 (*((uint32_t volatile*)(0x384000D0)))
|
| 134 | | -#define DMACOM6 (*((uint32_t volatile*)(0x384000D4)))
|
| 135 | | -#define DMABASE7 (*((void* volatile*)(0x384000E0)))
|
| 136 | | -#define DMACON7 (*((uint32_t volatile*)(0x384000E4)))
|
| 137 | | -#define DMATCNT7 (*((uint32_t volatile*)(0x384000E8)))
|
| 138 | | -#define DMACADDR7 (*((void* volatile*)(0x384000EC)))
|
| 139 | | -#define DMACTCNT7 (*((uint32_t volatile*)(0x384000F0)))
|
| 140 | | -#define DMACOM7 (*((uint32_t volatile*)(0x384000F4)))
|
| 141 | | -#define DMABASE8 (*((void* volatile*)(0x38400100)))
|
| 142 | | -#define DMACON8 (*((uint32_t volatile*)(0x38400104)))
|
| 143 | | -#define DMATCNT8 (*((uint32_t volatile*)(0x38400108)))
|
| 144 | | -#define DMACADDR8 (*((void* volatile*)(0x3840010C)))
|
| 145 | | -#define DMACTCNT8 (*((uint32_t volatile*)(0x38400110)))
|
| 146 | | -#define DMACOM8 (*((uint32_t volatile*)(0x38400114)))
|
| 147 | | -#define DMAALLST (*((uint32_t volatile*)(0x38400180)))
|
| 148 | | -#define DMAALLST2 (*((uint32_t volatile*)(0x38400184)))
|
| 149 | | -#define DMACON_DEVICE_SHIFT 30
|
| 150 | | -#define DMACON_DIRECTION_SHIFT 29
|
| 151 | | -#define DMACON_DATA_SIZE_SHIFT 22
|
| 152 | | -#define DMACON_BURST_LEN_SHIFT 19
|
| 153 | | -#define DMACOM_START 4
|
| 154 | | -#define DMACOM_CLEARBOTHDONE 7
|
| 155 | | -#define DMAALLST_WCOM0 (1 << 0)
|
| 156 | | -#define DMAALLST_HCOM0 (1 << 1)
|
| 157 | | -#define DMAALLST_DMABUSY0 (1 << 2)
|
| 158 | | -#define DMAALLST_HOLD_SKIP (1 << 3)
|
| 159 | | -#define DMAALLST_WCOM1 (1 << 4)
|
| 160 | | -#define DMAALLST_HCOM1 (1 << 5)
|
| 161 | | -#define DMAALLST_DMABUSY1 (1 << 6)
|
| 162 | | -#define DMAALLST_WCOM2 (1 << 8)
|
| 163 | | -#define DMAALLST_HCOM2 (1 << 9)
|
| 164 | | -#define DMAALLST_DMABUSY2 (1 << 10)
|
| 165 | | -#define DMAALLST_WCOM3 (1 << 12)
|
| 166 | | -#define DMAALLST_HCOM3 (1 << 13)
|
| 167 | | -#define DMAALLST_DMABUSY3 (1 << 14)
|
| 168 | | -#define DMAALLST_CHAN0_MASK (0xF << 0)
|
| 169 | | -#define DMAALLST_CHAN1_MASK (0xF << 4)
|
| 170 | | -#define DMAALLST_CHAN2_MASK (0xF << 8)
|
| 171 | | -#define DMAALLST_CHAN3_MASK (0xF << 12)
|
| 172 | | -
|
| 173 | | -
|
| 174 | | -/////FMC/////
|
| 175 | | -#define FMCTRL0 (*((uint32_t volatile*)(0x39400000)))
|
| 176 | | -#define FMCTRL1 (*((uint32_t volatile*)(0x39400004)))
|
| 177 | | -#define FMCMD (*((uint32_t volatile*)(0x39400008)))
|
| 178 | | -#define FMADDR0 (*((uint32_t volatile*)(0x3940000C)))
|
| 179 | | -#define FMADDR1 (*((uint32_t volatile*)(0x39400010)))
|
| 180 | | -#define FMANUM (*((uint32_t volatile*)(0x3940002C)))
|
| 181 | | -#define FMDNUM (*((uint32_t volatile*)(0x39400030)))
|
| 182 | | -#define FMCSTAT (*((uint32_t volatile*)(0x39400048)))
|
| 183 | | -#define FMFIFO (*((uint32_t volatile*)(0x39400080)))
|
| 184 | | -#define RS_ECC_CTRL (*((uint32_t volatile*)(0x39400100)))
|
| 185 | | -#define FMCTRL0_ENABLEDMA (1 << 10)
|
| 186 | | -#define FMCTRL0_UNK1 (1 << 11)
|
| 187 | | -#define FMCTRL1_DOTRANSADDR (1 << 0)
|
| 188 | | -#define FMCTRL1_DOREADDATA (1 << 1)
|
| 189 | | -#define FMCTRL1_DOWRITEDATA (1 << 2)
|
| 190 | | -#define FMCTRL1_CLEARWFIFO (1 << 6)
|
| 191 | | -#define FMCTRL1_CLEARRFIFO (1 << 7)
|
| 192 | | -#define FMCSTAT_RBB (1 << 0)
|
| 193 | | -#define FMCSTAT_RBBDONE (1 << 1)
|
| 194 | | -#define FMCSTAT_CMDDONE (1 << 2)
|
| 195 | | -#define FMCSTAT_ADDRDONE (1 << 3)
|
| 196 | | -#define FMCSTAT_BANK0READY (1 << 4)
|
| 197 | | -#define FMCSTAT_BANK1READY (1 << 5)
|
| 198 | | -#define FMCSTAT_BANK2READY (1 << 6)
|
| 199 | | -#define FMCSTAT_BANK3READY (1 << 7)
|
| 200 | | -
|
| 201 | | -
|
| 202 | | -/////ECC/////
|
| 203 | | -#define ECC_DATA_PTR (*((void* volatile*)(0x39E00004)))
|
| 204 | | -#define ECC_SPARE_PTR (*((void* volatile*)(0x39E00008)))
|
| 205 | | -#define ECC_CTRL (*((uint32_t volatile*)(0x39E0000C)))
|
| 206 | | -#define ECC_RESULT (*((uint32_t volatile*)(0x39E00010)))
|
| 207 | | -#define ECC_UNK1 (*((uint32_t volatile*)(0x39E00014)))
|
| 208 | | -#define ECC_INT_CLR (*((uint32_t volatile*)(0x39E00040)))
|
| 209 | | -#define ECCCTRL_STARTDECODING (1 << 0)
|
| 210 | | -#define ECCCTRL_STARTENCODING (1 << 1)
|
| 211 | | -#define ECCCTRL_STARTDECNOSYND (1 << 2)
|
| 212 | | -
|
| 213 | | -
|
| 214 | | -/////CLICKWHEEL/////
|
| 215 | | -#define WHEEL00 (*((uint32_t volatile*)(0x3C200000)))
|
| 216 | | -#define WHEEL04 (*((uint32_t volatile*)(0x3C200004)))
|
| 217 | | -#define WHEEL08 (*((uint32_t volatile*)(0x3C200008)))
|
| 218 | | -#define WHEEL0C (*((uint32_t volatile*)(0x3C20000C)))
|
| 219 | | -#define WHEEL10 (*((uint32_t volatile*)(0x3C200010)))
|
| 220 | | -#define WHEELINT (*((uint32_t volatile*)(0x3C200014)))
|
| 221 | | -#define WHEELRX (*((uint32_t volatile*)(0x3C200018)))
|
| 222 | | -#define WHEELTX (*((uint32_t volatile*)(0x3C20001C)))
|
| 223 | | -
|
| 224 | | -
|
| 225 | | -/////AES/////
|
| 226 | | -#define AESCONTROL (*((uint32_t volatile*)(0x39800000)))
|
| 227 | | -#define AESGO (*((uint32_t volatile*)(0x39800004)))
|
| 228 | | -#define AESUNKREG0 (*((uint32_t volatile*)(0x39800008)))
|
| 229 | | -#define AESSTATUS (*((uint32_t volatile*)(0x3980000C)))
|
| 230 | | -#define AESUNKREG1 (*((uint32_t volatile*)(0x39800010)))
|
| 231 | | -#define AESKEYLEN (*((uint32_t volatile*)(0x39800014)))
|
| 232 | | -#define AESOUTSIZE (*((uint32_t volatile*)(0x39800018)))
|
| 233 | | -#define AESOUTADDR (*((void* volatile*)(0x39800020)))
|
| 234 | | -#define AESINSIZE (*((uint32_t volatile*)(0x39800024)))
|
| 235 | | -#define AESINADDR (*((const void* volatile*)(0x39800028)))
|
| 236 | | -#define AESAUXSIZE (*((uint32_t volatile*)(0x3980002C)))
|
| 237 | | -#define AESAUXADDR (*((void* volatile*)(0x39800030)))
|
| 238 | | -#define AESSIZE3 (*((uint32_t volatile*)(0x39800034)))
|
| 239 | | -#define AESKEY ((uint32_t volatile*)(0x3980004C))
|
| 240 | | -#define AESTYPE (*((uint32_t volatile*)(0x3980006C)))
|
| 241 | | -#define AESIV ((uint32_t volatile*)(0x39800074))
|
| 242 | | -#define AESTYPE2 (*((uint32_t volatile*)(0x39800088)))
|
| 243 | | -#define AESUNKREG2 (*((uint32_t volatile*)(0x3980008C)))
|
| 244 | | -
|
| 245 | | -/////HASH/////
|
| 246 | | -#define HASHCTRL (*((uint32_t volatile*)(0x3C600000)))
|
| 247 | | -#define HASHRESULT ((uint32_t volatile*)(0x3C600020))
|
| 248 | | -#define HASHDATAIN ((uint32_t volatile*)(0x3C600040))
|
| 249 | | -
|
| 250 | | -
|
| 251 | | -/////TIMER/////
|
| 252 | | -#define TACON (*((uint32_t volatile*)(0x3C700000)))
|
| 253 | | -#define TACMD (*((uint32_t volatile*)(0x3C700004)))
|
| 254 | | -#define TADATA0 (*((uint32_t volatile*)(0x3C700008)))
|
| 255 | | -#define TADATA1 (*((uint32_t volatile*)(0x3C70000C)))
|
| 256 | | -#define TAPRE (*((uint32_t volatile*)(0x3C700010)))
|
| 257 | | -#define TACNT (*((uint32_t volatile*)(0x3C700014)))
|
| 258 | | -#define TBCON (*((uint32_t volatile*)(0x3C700020)))
|
| 259 | | -#define TBCMD (*((uint32_t volatile*)(0x3C700024)))
|
| 260 | | -#define TBDATA0 (*((uint32_t volatile*)(0x3C700028)))
|
| 261 | | -#define TBDATA1 (*((uint32_t volatile*)(0x3C70002C)))
|
| 262 | | -#define TBPRE (*((uint32_t volatile*)(0x3C700030)))
|
| 263 | | -#define TBCNT (*((uint32_t volatile*)(0x3C700034)))
|
| 264 | | -#define TCCON (*((uint32_t volatile*)(0x3C700040)))
|
| 265 | | -#define TCCMD (*((uint32_t volatile*)(0x3C700044)))
|
| 266 | | -#define TCDATA0 (*((uint32_t volatile*)(0x3C700048)))
|
| 267 | | -#define TCDATA1 (*((uint32_t volatile*)(0x3C70004C)))
|
| 268 | | -#define TCPRE (*((uint32_t volatile*)(0x3C700050)))
|
| 269 | | -#define TCCNT (*((uint32_t volatile*)(0x3C700054)))
|
| 270 | | -#define TDCON (*((uint32_t volatile*)(0x3C700060)))
|
| 271 | | -#define TDCMD (*((uint32_t volatile*)(0x3C700064)))
|
| 272 | | -#define TDDATA0 (*((uint32_t volatile*)(0x3C700068)))
|
| 273 | | -#define TDDATA1 (*((uint32_t volatile*)(0x3C70006C)))
|
| 274 | | -#define TDPRE (*((uint32_t volatile*)(0x3C700070)))
|
| 275 | | -#define TDCNT (*((uint32_t volatile*)(0x3C700074)))
|
| 276 | | -
|
| 277 | | -
|
| 278 | | -/////USB/////
|
| 279 | | -#define OTGBASE 0x38800000
|
| 280 | | -#define PHYBASE 0x3C400000
|
| 281 | | -#define SYNOPSYSOTG_CLOCK 0
|
| 282 | | -#define SYNOPSYSOTG_AHBCFG 0x27
|
| 283 | | -
|
| 284 | | -
|
| 285 | | -/////I2C/////
|
| 286 | | -#define IICCON (*((uint32_t volatile*)(0x3C900000)))
|
| 287 | | -#define IICSTAT (*((uint32_t volatile*)(0x3C900004)))
|
| 288 | | -#define IICADD (*((uint32_t volatile*)(0x3C900008)))
|
| 289 | | -#define IICDS (*((uint32_t volatile*)(0x3C90000C)))
|
| 290 | | -
|
| 291 | | -
|
| 292 | | -/////LCD/////
|
| 293 | | -#define LCDCON (*((uint32_t volatile*)(0x38600040)))
|
| 294 | | -#define LCDWCMD (*((uint32_t volatile*)(0x38600004)))
|
| 295 | | -#define LCDPHTIME (*((uint32_t volatile*)(0x38600010)))
|
| 296 | | -#define LCDSTATUS (*((uint32_t volatile*)(0x3860001c)))
|
| 297 | | -#define LCDWDATA (*((uint32_t volatile*)(0x38600040)))
|
| 298 | | -
|
| 299 | | -
|
| 300 | | -/////CLOCK GATES/////
|
| 301 | | -#define CLOCKGATE_USB_1 14
|
| 302 | | -#define CLOCKGATE_USB_2 43
|
| 303 | | -
|
| 304 | | -
|
| 305 | | -/////INTERRUPTS/////
|
| 306 | | -#define IRQ_TIMER 5
|
| 307 | | -#define IRQ_DMA 10
|
| 308 | | -#define IRQ_USB_FUNC 16
|
| 309 | | -#define IRQ_ECC 19
|
| 310 | | -#define IRQ_WHEEL 26
|
| 311 | | -#define IRQ_IIC 27
|
| 312 | | -
|
| 313 | | -
|
| 314 | | -#endif
|
| | 2 | +// |
| | 3 | +// |
| | 4 | +// Copyright 2010 TheSeven |
| | 5 | +// |
| | 6 | +// |
| | 7 | +// This file is part of emCORE. |
| | 8 | +// |
| | 9 | +// emCORE is free software: you can redistribute it and/or |
| | 10 | +// modify it under the terms of the GNU General Public License as |
| | 11 | +// published by the Free Software Foundation, either version 2 of the |
| | 12 | +// License, or (at your option) any later version. |
| | 13 | +// |
| | 14 | +// emCORE is distributed in the hope that it will be useful, |
| | 15 | +// but WITHOUT ANY WARRANTY; without even the implied warranty of |
| | 16 | +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
| | 17 | +// See the GNU General Public License for more details. |
| | 18 | +// |
| | 19 | +// You should have received a copy of the GNU General Public License along |
| | 20 | +// with emCORE. If not, see <http://www.gnu.org/licenses/>. |
| | 21 | +// |
| | 22 | +// |
| | 23 | + |
| | 24 | + |
| | 25 | +#ifndef __S5L8701_H__ |
| | 26 | +#define __S5L8701_H__ |
| | 27 | + |
| | 28 | +#include "global.h" |
| | 29 | + |
| | 30 | + |
| | 31 | +/////CLKCON///// |
| | 32 | +#define CLKCON (*((uint32_t volatile*)(0x3C500000))) |
| | 33 | +#define PLL0PMS (*((uint32_t volatile*)(0x3C500004))) |
| | 34 | +#define PLL1PMS (*((uint32_t volatile*)(0x3C500008))) |
| | 35 | +#define PLL2PMS (*((uint32_t volatile*)(0x3C50000C))) |
| | 36 | +#define PLL0LCNT (*((uint32_t volatile*)(0x3C500014))) |
| | 37 | +#define PLL1LCNT (*((uint32_t volatile*)(0x3C500018))) |
| | 38 | +#define PLL2LCNT (*((uint32_t volatile*)(0x3C50001C))) |
| | 39 | +#define PLLLOCK (*((uint32_t volatile*)(0x3C500020))) |
| | 40 | +#define PLLCON (*((uint32_t volatile*)(0x3C500024))) |
| | 41 | +#define PWRMODE (*((uint32_t volatile*)(0x3C50002C))) |
| | 42 | +#define SWRCON (*((uint32_t volatile*)(0x3C500030))) |
| | 43 | +#define RSTSR (*((uint32_t volatile*)(0x3C500034))) |
| | 44 | +#define DSPCLKMD (*((uint32_t volatile*)(0x3C500038))) |
| | 45 | +#define CLKCON2 (*((uint32_t volatile*)(0x3C50003C))) |
| | 46 | +#define PWRCON(i) (*((uint32_t volatile*)(0x3C500000 + ((i) == 1 ? 0x40 : 0x28)))) |
| | 47 | + |
| | 48 | + |
| | 49 | +/////ICU///// |
| | 50 | +#define SRCPND (*((uint32_t volatile*)(0x39C00000))) |
| | 51 | +#define INTMOD (*((uint32_t volatile*)(0x39C00004))) |
| | 52 | +#define INTMSK (*((uint32_t volatile*)(0x39C00008))) |
| | 53 | +#define INTPRIO (*((uint32_t volatile*)(0x39C0000C))) |
| | 54 | +#define INTPND (*((uint32_t volatile*)(0x39C00010))) |
| | 55 | +#define INTOFFSET (*((uint32_t volatile*)(0x39C00014))) |
| | 56 | +#define EINTPOL (*((uint32_t volatile*)(0x39C00018))) |
| | 57 | +#define EINTPEND (*((uint32_t volatile*)(0x39C0001C))) |
| | 58 | +#define EINTMSK (*((uint32_t volatile*)(0x39C00020))) |
| | 59 | + |
| | 60 | + |
| | 61 | +/////GPIO///// |
| | 62 | +#define PCON0 (*((uint32_t volatile*)(0x3CF00000))) |
| | 63 | +#define PDAT0 (*((uint32_t volatile*)(0x3CF00004))) |
| | 64 | +#define PCON1 (*((uint32_t volatile*)(0x3CF00010))) |
| | 65 | +#define PDAT1 (*((uint32_t volatile*)(0x3CF00014))) |
| | 66 | +#define PCON2 (*((uint32_t volatile*)(0x3CF00020))) |
| | 67 | +#define PDAT2 (*((uint32_t volatile*)(0x3CF00024))) |
| | 68 | +#define PCON3 (*((uint32_t volatile*)(0x3CF00030))) |
| | 69 | +#define PDAT3 (*((uint32_t volatile*)(0x3CF00034))) |
| | 70 | +#define PCON4 (*((uint32_t volatile*)(0x3CF00040))) |
| | 71 | +#define PDAT4 (*((uint32_t volatile*)(0x3CF00044))) |
| | 72 | +#define PCON5 (*((uint32_t volatile*)(0x3CF00050))) |
| | 73 | +#define PDAT5 (*((uint32_t volatile*)(0x3CF00054))) |
| | 74 | +#define PUNK5 (*((uint32_t volatile*)(0x3CF0005C))) |
| | 75 | +#define PCON6 (*((uint32_t volatile*)(0x3CF00060))) |
| | 76 | +#define PDAT6 (*((uint32_t volatile*)(0x3CF00064))) |
| | 77 | +#define PCON7 (*((uint32_t volatile*)(0x3CF00070))) |
| | 78 | +#define PDAT7 (*((uint32_t volatile*)(0x3CF00074))) |
| | 79 | +#define PCON10 (*((uint32_t volatile*)(0x3CF000A0))) |
| | 80 | +#define PDAT10 (*((uint32_t volatile*)(0x3CF000A4))) |
| | 81 | +#define PCON11 (*((uint32_t volatile*)(0x3CF000B0))) |
| | 82 | +#define PDAT11 (*((uint32_t volatile*)(0x3CF000B4))) |
| | 83 | +#define PCON13 (*((uint32_t volatile*)(0x3CF000D0))) |
| | 84 | +#define PDAT13 (*((uint32_t volatile*)(0x3CF000D4))) |
| | 85 | +#define PCON14 (*((uint32_t volatile*)(0x3CF000E0))) |
| | 86 | +#define PDAT14 (*((uint32_t volatile*)(0x3CF000E4))) |
| | 87 | +#define PCON15 (*((uint32_t volatile*)(0x3CF000F0))) |
| | 88 | +#define PUNK15 (*((uint32_t volatile*)(0x3CF000FC))) |
| | 89 | + |
| | 90 | + |
| | 91 | +/////IODMA///// |
| | 92 | +#define DMABASE0 (*((void* volatile*)(0x38400000))) |
| | 93 | +#define DMACON0 (*((uint32_t volatile*)(0x38400004))) |
| | 94 | +#define DMATCNT0 (*((uint32_t volatile*)(0x38400008))) |
| | 95 | +#define DMACADDR0 (*((void* volatile*)(0x3840000C))) |
| | 96 | +#define DMACTCNT0 (*((uint32_t volatile*)(0x38400010))) |
| | 97 | +#define DMACOM0 (*((uint32_t volatile*)(0x38400014))) |
| | 98 | +#define DMANOF0 (*((uint32_t volatile*)(0x38400018))) |
| | 99 | +#define DMABASE1 (*((void* volatile*)(0x38400020))) |
| | 100 | +#define DMACON1 (*((uint32_t volatile*)(0x38400024))) |
| | 101 | +#define DMATCNT1 (*((uint32_t volatile*)(0x38400028))) |
| | 102 | +#define DMACADDR1 (*((void* volatile*)(0x3840002C))) |
| | 103 | +#define DMACTCNT1 (*((uint32_t volatile*)(0x38400030))) |
| | 104 | +#define DMACOM1 (*((uint32_t volatile*)(0x38400034))) |
| | 105 | +#define DMABASE2 (*((void* volatile*)(0x38400040))) |
| | 106 | +#define DMACON2 (*((uint32_t volatile*)(0x38400044))) |
| | 107 | +#define DMATCNT2 (*((uint32_t volatile*)(0x38400048))) |
| | 108 | +#define DMACADDR2 (*((void* volatile*)(0x3840004C))) |
| | 109 | +#define DMACTCNT2 (*((uint32_t volatile*)(0x38400050))) |
| | 110 | +#define DMACOM2 (*((uint32_t volatile*)(0x38400054))) |
| | 111 | +#define DMABASE3 (*((void* volatile*)(0x38400060))) |
| | 112 | +#define DMACON3 (*((uint32_t volatile*)(0x38400064))) |
| | 113 | +#define DMATCNT3 (*((uint32_t volatile*)(0x38400068))) |
| | 114 | +#define DMACADDR3 (*((void* volatile*)(0x3840006C))) |
| | 115 | +#define DMACTCNT3 (*((uint32_t volatile*)(0x38400070))) |
| | 116 | +#define DMACOM3 (*((uint32_t volatile*)(0x38400074))) |
| | 117 | +#define DMABASE4 (*((void* volatile*)(0x38400080))) |
| | 118 | +#define DMACON4 (*((uint32_t volatile*)(0x38400084))) |
| | 119 | +#define DMATCNT4 (*((uint32_t volatile*)(0x38400088))) |
| | 120 | +#define DMACADDR4 (*((void* volatile*)(0x3840008C))) |
| | 121 | +#define DMACTCNT4 (*((uint32_t volatile*)(0x38400090))) |
| | 122 | +#define DMACOM4 (*((uint32_t volatile*)(0x38400094))) |
| | 123 | +#define DMABASE5 (*((void* volatile*)(0x384000A0))) |
| | 124 | +#define DMACON5 (*((uint32_t volatile*)(0x384000A4))) |
| | 125 | +#define DMATCNT5 (*((uint32_t volatile*)(0x384000A8))) |
| | 126 | +#define DMACADDR5 (*((void* volatile*)(0x384000AC))) |
| | 127 | +#define DMACTCNT5 (*((uint32_t volatile*)(0x384000B0))) |
| | 128 | +#define DMACOM5 (*((uint32_t volatile*)(0x384000B4))) |
| | 129 | +#define DMABASE6 (*((void* volatile*)(0x384000C0))) |
| | 130 | +#define DMACON6 (*((uint32_t volatile*)(0x384000C4))) |
| | 131 | +#define DMATCNT6 (*((uint32_t volatile*)(0x384000C8))) |
| | 132 | +#define DMACADDR6 (*((void* volatile*)(0x384000CC))) |
| | 133 | +#define DMACTCNT6 (*((uint32_t volatile*)(0x384000D0))) |
| | 134 | +#define DMACOM6 (*((uint32_t volatile*)(0x384000D4))) |
| | 135 | +#define DMABASE7 (*((void* volatile*)(0x384000E0))) |
| | 136 | +#define DMACON7 (*((uint32_t volatile*)(0x384000E4))) |
| | 137 | +#define DMATCNT7 (*((uint32_t volatile*)(0x384000E8))) |
| | 138 | +#define DMACADDR7 (*((void* volatile*)(0x384000EC))) |
| | 139 | +#define DMACTCNT7 (*((uint32_t volatile*)(0x384000F0))) |
| | 140 | +#define DMACOM7 (*((uint32_t volatile*)(0x384000F4))) |
| | 141 | +#define DMABASE8 (*((void* volatile*)(0x38400100))) |
| | 142 | +#define DMACON8 (*((uint32_t volatile*)(0x38400104))) |
| | 143 | +#define DMATCNT8 (*((uint32_t volatile*)(0x38400108))) |
| | 144 | +#define DMACADDR8 (*((void* volatile*)(0x3840010C))) |
| | 145 | +#define DMACTCNT8 (*((uint32_t volatile*)(0x38400110))) |
| | 146 | +#define DMACOM8 (*((uint32_t volatile*)(0x38400114))) |
| | 147 | +#define DMAALLST (*((uint32_t volatile*)(0x38400180))) |
| | 148 | +#define DMAALLST2 (*((uint32_t volatile*)(0x38400184))) |
| | 149 | +#define DMACON_DEVICE_SHIFT 30 |
| | 150 | +#define DMACON_DIRECTION_SHIFT 29 |
| | 151 | +#define DMACON_DATA_SIZE_SHIFT 22 |
| | 152 | +#define DMACON_BURST_LEN_SHIFT 19 |
| | 153 | +#define DMACOM_START 4 |
| | 154 | +#define DMACOM_CLEARBOTHDONE 7 |
| | 155 | +#define DMAALLST_WCOM0 (1 << 0) |
| | 156 | +#define DMAALLST_HCOM0 (1 << 1) |
| | 157 | +#define DMAALLST_DMABUSY0 (1 << 2) |
| | 158 | +#define DMAALLST_HOLD_SKIP (1 << 3) |
| | 159 | +#define DMAALLST_WCOM1 (1 << 4) |
| | 160 | +#define DMAALLST_HCOM1 (1 << 5) |
| | 161 | +#define DMAALLST_DMABUSY1 (1 << 6) |
| | 162 | +#define DMAALLST_WCOM2 (1 << 8) |
| | 163 | +#define DMAALLST_HCOM2 (1 << 9) |
| | 164 | +#define DMAALLST_DMABUSY2 (1 << 10) |
| | 165 | +#define DMAALLST_WCOM3 (1 << 12) |
| | 166 | +#define DMAALLST_HCOM3 (1 << 13) |
| | 167 | +#define DMAALLST_DMABUSY3 (1 << 14) |
| | 168 | +#define DMAALLST_CHAN0_MASK (0xF << 0) |
| | 169 | +#define DMAALLST_CHAN1_MASK (0xF << 4) |
| | 170 | +#define DMAALLST_CHAN2_MASK (0xF << 8) |
| | 171 | +#define DMAALLST_CHAN3_MASK (0xF << 12) |
| | 172 | + |
| | 173 | + |
| | 174 | +/////FMC///// |
| | 175 | +#define FMCTRL0 (*((uint32_t volatile*)(0x39400000))) |
| | 176 | +#define FMCTRL1 (*((uint32_t volatile*)(0x39400004))) |
| | 177 | +#define FMCMD (*((uint32_t volatile*)(0x39400008))) |
| | 178 | +#define FMADDR0 (*((uint32_t volatile*)(0x3940000C))) |
| | 179 | +#define FMADDR1 (*((uint32_t volatile*)(0x39400010))) |
| | 180 | +#define FMANUM (*((uint32_t volatile*)(0x3940002C))) |
| | 181 | +#define FMDNUM (*((uint32_t volatile*)(0x39400030))) |
| | 182 | +#define FMCSTAT (*((uint32_t volatile*)(0x39400048))) |
| | 183 | +#define FMFIFO (*((uint32_t volatile*)(0x39400080))) |
| | 184 | +#define RS_ECC_CTRL (*((uint32_t volatile*)(0x39400100))) |
| | 185 | +#define FMCTRL0_ENABLEDMA (1 << 10) |
| | 186 | +#define FMCTRL0_UNK1 (1 << 11) |
| | 187 | +#define FMCTRL1_DOTRANSADDR (1 << 0) |
| | 188 | +#define FMCTRL1_DOREADDATA (1 << 1) |
| | 189 | +#define FMCTRL1_DOWRITEDATA (1 << 2) |
| | 190 | +#define FMCTRL1_CLEARWFIFO (1 << 6) |
| | 191 | +#define FMCTRL1_CLEARRFIFO (1 << 7) |
| | 192 | +#define FMCSTAT_RBB (1 << 0) |
| | 193 | +#define FMCSTAT_RBBDONE (1 << 1) |
| | 194 | +#define FMCSTAT_CMDDONE (1 << 2) |
| | 195 | +#define FMCSTAT_ADDRDONE (1 << 3) |
| | 196 | +#define FMCSTAT_BANK0READY (1 << 4) |
| | 197 | +#define FMCSTAT_BANK1READY (1 << 5) |
| | 198 | +#define FMCSTAT_BANK2READY (1 << 6) |
| | 199 | +#define FMCSTAT_BANK3READY (1 << 7) |
| | 200 | + |
| | 201 | + |
| | 202 | +/////ECC///// |
| | 203 | +#define ECC_DATA_PTR (*((void* volatile*)(0x39E00004))) |
| | 204 | +#define ECC_SPARE_PTR (*((void* volatile*)(0x39E00008))) |
| | 205 | +#define ECC_CTRL (*((uint32_t volatile*)(0x39E0000C))) |
| | 206 | +#define ECC_RESULT (*((uint32_t volatile*)(0x39E00010))) |
| | 207 | +#define ECC_UNK1 (*((uint32_t volatile*)(0x39E00014))) |
| | 208 | +#define ECC_INT_CLR (*((uint32_t volatile*)(0x39E00040))) |
| | 209 | +#define ECCCTRL_STARTDECODING (1 << 0) |
| | 210 | +#define ECCCTRL_STARTENCODING (1 << 1) |
| | 211 | +#define ECCCTRL_STARTDECNOSYND (1 << 2) |
| | 212 | + |
| | 213 | + |
| | 214 | +/////CLICKWHEEL///// |
| | 215 | +#define WHEEL00 (*((uint32_t volatile*)(0x3C200000))) |
| | 216 | +#define WHEEL04 (*((uint32_t volatile*)(0x3C200004))) |
| | 217 | +#define WHEEL08 (*((uint32_t volatile*)(0x3C200008))) |
| | 218 | +#define WHEEL0C (*((uint32_t volatile*)(0x3C20000C))) |
| | 219 | +#define WHEEL10 (*((uint32_t volatile*)(0x3C200010))) |
| | 220 | +#define WHEELINT (*((uint32_t volatile*)(0x3C200014))) |
| | 221 | +#define WHEELRX (*((uint32_t volatile*)(0x3C200018))) |
| | 222 | +#define WHEELTX (*((uint32_t volatile*)(0x3C20001C))) |
| | 223 | + |
| | 224 | + |
| | 225 | +/////AES///// |
| | 226 | +#define AESCONTROL (*((uint32_t volatile*)(0x39800000))) |
| | 227 | +#define AESGO (*((uint32_t volatile*)(0x39800004))) |
| | 228 | +#define AESUNKREG0 (*((uint32_t volatile*)(0x39800008))) |
| | 229 | +#define AESSTATUS (*((uint32_t volatile*)(0x3980000C))) |
| | 230 | +#define AESUNKREG1 (*((uint32_t volatile*)(0x39800010))) |
| | 231 | +#define AESKEYLEN (*((uint32_t volatile*)(0x39800014))) |
| | 232 | +#define AESOUTSIZE (*((uint32_t volatile*)(0x39800018))) |
| | 233 | +#define AESOUTADDR (*((void* volatile*)(0x39800020))) |
| | 234 | +#define AESINSIZE (*((uint32_t volatile*)(0x39800024))) |
| | 235 | +#define AESINADDR (*((const void* volatile*)(0x39800028))) |
| | 236 | +#define AESAUXSIZE (*((uint32_t volatile*)(0x3980002C))) |
| | 237 | +#define AESAUXADDR (*((void* volatile*)(0x39800030))) |
| | 238 | +#define AESSIZE3 (*((uint32_t volatile*)(0x39800034))) |
| | 239 | +#define AESKEY ((uint32_t volatile*)(0x3980004C)) |
| | 240 | +#define AESTYPE (*((uint32_t volatile*)(0x3980006C))) |
| | 241 | +#define AESIV ((uint32_t volatile*)(0x39800074)) |
| | 242 | +#define AESTYPE2 (*((uint32_t volatile*)(0x39800088))) |
| | 243 | +#define AESUNKREG2 (*((uint32_t volatile*)(0x3980008C))) |
| | 244 | + |
| | 245 | +/////HASH///// |
| | 246 | +#define HASHCTRL (*((uint32_t volatile*)(0x3C600000))) |
| | 247 | +#define HASHRESULT ((uint32_t volatile*)(0x3C600020)) |
| | 248 | +#define HASHDATAIN ((uint32_t volatile*)(0x3C600040)) |
| | 249 | + |
| | 250 | + |
| | 251 | +/////TIMER///// |
| | 252 | +#define TACON (*((uint32_t volatile*)(0x3C700000))) |
| | 253 | +#define TACMD (*((uint32_t volatile*)(0x3C700004))) |
| | 254 | +#define TADATA0 (*((uint32_t volatile*)(0x3C700008))) |
| | 255 | +#define TADATA1 (*((uint32_t volatile*)(0x3C70000C))) |
| | 256 | +#define TAPRE (*((uint32_t volatile*)(0x3C700010))) |
| | 257 | +#define TACNT (*((uint32_t volatile*)(0x3C700014))) |
| | 258 | +#define TBCON (*((uint32_t volatile*)(0x3C700020))) |
| | 259 | +#define TBCMD (*((uint32_t volatile*)(0x3C700024))) |
| | 260 | +#define TBDATA0 (*((uint32_t volatile*)(0x3C700028))) |
| | 261 | +#define TBDATA1 (*((uint32_t volatile*)(0x3C70002C))) |
| | 262 | +#define TBPRE (*((uint32_t volatile*)(0x3C700030))) |
| | 263 | +#define TBCNT (*((uint32_t volatile*)(0x3C700034))) |
| | 264 | +#define TCCON (*((uint32_t volatile*)(0x3C700040))) |
| | 265 | +#define TCCMD (*((uint32_t volatile*)(0x3C700044))) |
| | 266 | +#define TCDATA0 (*((uint32_t volatile*)(0x3C700048))) |
| | 267 | +#define TCDATA1 (*((uint32_t volatile*)(0x3C70004C))) |
| | 268 | +#define TCPRE (*((uint32_t volatile*)(0x3C700050))) |
| | 269 | +#define TCCNT (*((uint32_t volatile*)(0x3C700054))) |
| | 270 | +#define TDCON (*((uint32_t volatile*)(0x3C700060))) |
| | 271 | +#define TDCMD (*((uint32_t volatile*)(0x3C700064))) |
| | 272 | +#define TDDATA0 (*((uint32_t volatile*)(0x3C700068))) |
| | 273 | +#define TDDATA1 (*((uint32_t volatile*)(0x3C70006C))) |
| | 274 | +#define TDPRE (*((uint32_t volatile*)(0x3C700070))) |
| | 275 | +#define TDCNT (*((uint32_t volatile*)(0x3C700074))) |
| | 276 | + |
| | 277 | + |
| | 278 | +/////USB///// |
| | 279 | +#define OTGBASE 0x38800000 |
| | 280 | +#define PHYBASE 0x3C400000 |
| | 281 | +#define SYNOPSYSOTG_CLOCK 0 |
| | 282 | +#define SYNOPSYSOTG_AHBCFG 0x27 |
| | 283 | + |
| | 284 | + |
| | 285 | +/////I2C///// |
| | 286 | +#define IICCON (*((uint32_t volatile*)(0x3C900000))) |
| | 287 | +#define IICSTAT (*((uint32_t volatile*)(0x3C900004))) |
| | 288 | +#define IICADD (*((uint32_t volatile*)(0x3C900008))) |
| | 289 | +#define IICDS (*((uint32_t volatile*)(0x3C90000C))) |
| | 290 | + |
| | 291 | + |
| | 292 | +/////LCD///// |
| | 293 | +#define LCDCON (*((uint32_t volatile*)(0x38600000))) |
| | 294 | +#define LCDWCMD (*((uint32_t volatile*)(0x38600004))) |
| | 295 | +#define LCDPHTIME (*((uint32_t volatile*)(0x38600010))) |
| | 296 | +#define LCDSTATUS (*((uint32_t volatile*)(0x3860001c))) |
| | 297 | +#define LCDWDATA (*((uint32_t volatile*)(0x38600040))) |
| | 298 | + |
| | 299 | + |
| | 300 | +/////CLOCK GATES///// |
| | 301 | +#define CLOCKGATE_USB_1 14 |
| | 302 | +#define CLOCKGATE_USB_2 43 |
| | 303 | + |
| | 304 | + |
| | 305 | +/////INTERRUPTS///// |
| | 306 | +#define IRQ_TIMER 5 |
| | 307 | +#define IRQ_DMA 10 |
| | 308 | +#define IRQ_USB_FUNC 16 |
| | 309 | +#define IRQ_ECC 19 |
| | 310 | +#define IRQ_WHEEL 26 |
| | 311 | +#define IRQ_IIC 27 |
| | 312 | + |
| | 313 | + |
| | 314 | +#endif |
| Index: emcore/trunk/target/ipodnano3g/s5l8702.h |
| — | — | @@ -1,600 +1,601 @@ |
| 2 | | -//
|
| 3 | | -//
|
| 4 | | -// Copyright 2010 TheSeven
|
| 5 | | -//
|
| 6 | | -//
|
| 7 | | -// This file is part of emCORE.
|
| 8 | | -//
|
| 9 | | -// emCORE is free software: you can redistribute it and/or
|
| 10 | | -// modify it under the terms of the GNU General Public License as
|
| 11 | | -// published by the Free Software Foundation, either version 2 of the
|
| 12 | | -// License, or (at your option) any later version.
|
| 13 | | -//
|
| 14 | | -// emCORE is distributed in the hope that it will be useful,
|
| 15 | | -// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
| 16 | | -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
| 17 | | -// See the GNU General Public License for more details.
|
| 18 | | -//
|
| 19 | | -// You should have received a copy of the GNU General Public License along
|
| 20 | | -// with emCORE. If not, see <http://www.gnu.org/licenses/>.
|
| 21 | | -//
|
| 22 | | -//
|
| 23 | | -
|
| 24 | | -
|
| 25 | | -#ifndef __S5L8702_H__
|
| 26 | | -#define __S5L8702_H__
|
| 27 | | -
|
| 28 | | -#include "global.h"
|
| 29 | | -
|
| 30 | | -
|
| 31 | | -/////SYSCON/////
|
| 32 | | -#define PWRCON(i) (*((uint32_t volatile*)(0x3C500000 \
|
| 33 | | - + ((i) == 4 ? 0x6C : \
|
| 34 | | - ((i) == 3 ? 0x68 : \
|
| 35 | | - ((i) == 2 ? 0x58 : \
|
| 36 | | - ((i) == 1 ? 0x4C : \
|
| 37 | | - 0x48)))))))
|
| 38 | | -
|
| 39 | | -
|
| 40 | | -/////TIMER/////
|
| 41 | | -#define TACON (*((uint32_t volatile*)(0x3C700000)))
|
| 42 | | -#define TACMD (*((uint32_t volatile*)(0x3C700004)))
|
| 43 | | -#define TADATA0 (*((uint32_t volatile*)(0x3C700008)))
|
| 44 | | -#define TADATA1 (*((uint32_t volatile*)(0x3C70000C)))
|
| 45 | | -#define TAPRE (*((uint32_t volatile*)(0x3C700010)))
|
| 46 | | -#define TACNT (*((uint32_t volatile*)(0x3C700014)))
|
| 47 | | -#define TBCON (*((uint32_t volatile*)(0x3C700020)))
|
| 48 | | -#define TBCMD (*((uint32_t volatile*)(0x3C700024)))
|
| 49 | | -#define TBDATA0 (*((uint32_t volatile*)(0x3C700028)))
|
| 50 | | -#define TBDATA1 (*((uint32_t volatile*)(0x3C70002C)))
|
| 51 | | -#define TBPRE (*((uint32_t volatile*)(0x3C700030)))
|
| 52 | | -#define TBCNT (*((uint32_t volatile*)(0x3C700034)))
|
| 53 | | -#define TCCON (*((uint32_t volatile*)(0x3C700040)))
|
| 54 | | -#define TCCMD (*((uint32_t volatile*)(0x3C700044)))
|
| 55 | | -#define TCDATA0 (*((uint32_t volatile*)(0x3C700048)))
|
| 56 | | -#define TCDATA1 (*((uint32_t volatile*)(0x3C70004C)))
|
| 57 | | -#define TCPRE (*((uint32_t volatile*)(0x3C700050)))
|
| 58 | | -#define TCCNT (*((uint32_t volatile*)(0x3C700054)))
|
| 59 | | -#define TDCON (*((uint32_t volatile*)(0x3C700060)))
|
| 60 | | -#define TDCMD (*((uint32_t volatile*)(0x3C700064)))
|
| 61 | | -#define TDDATA0 (*((uint32_t volatile*)(0x3C700068)))
|
| 62 | | -#define TDDATA1 (*((uint32_t volatile*)(0x3C70006C)))
|
| 63 | | -#define TDPRE (*((uint32_t volatile*)(0x3C700070)))
|
| 64 | | -#define TDCNT (*((uint32_t volatile*)(0x3C700074)))
|
| 65 | | -#define TECON (*((uint32_t volatile*)(0x3C7000A0)))
|
| 66 | | -#define TECMD (*((uint32_t volatile*)(0x3C7000A4)))
|
| 67 | | -#define TEDATA0 (*((uint32_t volatile*)(0x3C7000A8)))
|
| 68 | | -#define TEDATA1 (*((uint32_t volatile*)(0x3C7000AC)))
|
| 69 | | -#define TEPRE (*((uint32_t volatile*)(0x3C7000B0)))
|
| 70 | | -#define TECNT (*((uint32_t volatile*)(0x3C7000B4)))
|
| 71 | | -#define TFCON (*((uint32_t volatile*)(0x3C7000C0)))
|
| 72 | | -#define TFCMD (*((uint32_t volatile*)(0x3C7000C4)))
|
| 73 | | -#define TFDATA0 (*((uint32_t volatile*)(0x3C7000C8)))
|
| 74 | | -#define TFDATA1 (*((uint32_t volatile*)(0x3C7000CC)))
|
| 75 | | -#define TFPRE (*((uint32_t volatile*)(0x3C7000D0)))
|
| 76 | | -#define TFCNT (*((uint32_t volatile*)(0x3C7000D4)))
|
| 77 | | -#define TGCON (*((uint32_t volatile*)(0x3C7000E0)))
|
| 78 | | -#define TGCMD (*((uint32_t volatile*)(0x3C7000E4)))
|
| 79 | | -#define TGDATA0 (*((uint32_t volatile*)(0x3C7000E8)))
|
| 80 | | -#define TGDATA1 (*((uint32_t volatile*)(0x3C7000EC)))
|
| 81 | | -#define TGPRE (*((uint32_t volatile*)(0x3C7000F0)))
|
| 82 | | -#define TGCNT (*((uint32_t volatile*)(0x3C7000F4)))
|
| 83 | | -#define THCON (*((uint32_t volatile*)(0x3C700100)))
|
| 84 | | -#define THCMD (*((uint32_t volatile*)(0x3C700104)))
|
| 85 | | -#define THDATA0 (*((uint32_t volatile*)(0x3C700108)))
|
| 86 | | -#define THDATA1 (*((uint32_t volatile*)(0x3C70010C)))
|
| 87 | | -#define THPRE (*((uint32_t volatile*)(0x3C700110)))
|
| 88 | | -#define THCNT (*((uint32_t volatile*)(0x3C700114)))
|
| 89 | | -
|
| 90 | | -
|
| 91 | | -/////USB/////
|
| 92 | | -#define OTGBASE 0x38400000
|
| 93 | | -#define PHYBASE 0x3C400000
|
| 94 | | -#define SYNOPSYSOTG_CLOCK 0
|
| 95 | | -#define SYNOPSYSOTG_AHBCFG 0x2B
|
| 96 | | -
|
| 97 | | -
|
| 98 | | -/////I2C/////
|
| 99 | | -#define IICCON(bus) (*((uint32_t volatile*)(0x3C600000 + 0x300000 * (bus))))
|
| 100 | | -#define IICSTAT(bus) (*((uint32_t volatile*)(0x3C600004 + 0x300000 * (bus))))
|
| 101 | | -#define IICADD(bus) (*((uint32_t volatile*)(0x3C600008 + 0x300000 * (bus))))
|
| 102 | | -#define IICDS(bus) (*((uint32_t volatile*)(0x3C60000C + 0x300000 * (bus))))
|
| 103 | | -#define IIC10(bus) (*((uint32_t volatile*)(0x3C600010 + 0x300000 * (bus))))
|
| 104 | | -
|
| 105 | | -
|
| 106 | | -/////INTERRUPT CONTROLLERS/////
|
| 107 | | -#define VICIRQSTATUS(v) (*((uint32_t volatile*)(0x38E00000 + 0x1000 * (v))))
|
| 108 | | -#define VICFIQSTATUS(v) (*((uint32_t volatile*)(0x38E00004 + 0x1000 * (v))))
|
| 109 | | -#define VICRAWINTR(v) (*((uint32_t volatile*)(0x38E00008 + 0x1000 * (v))))
|
| 110 | | -#define VICINTSELECT(v) (*((uint32_t volatile*)(0x38E0000C + 0x1000 * (v))))
|
| 111 | | -#define VICINTENABLE(v) (*((uint32_t volatile*)(0x38E00010 + 0x1000 * (v))))
|
| 112 | | -#define VICINTENCLEAR(v) (*((uint32_t volatile*)(0x38E00014 + 0x1000 * (v))))
|
| 113 | | -#define VICSOFTINT(v) (*((uint32_t volatile*)(0x38E00018 + 0x1000 * (v))))
|
| 114 | | -#define VICSOFTINTCLEAR(v) (*((uint32_t volatile*)(0x38E0001C + 0x1000 * (v))))
|
| 115 | | -#define VICPROTECTION(v) (*((uint32_t volatile*)(0x38E00020 + 0x1000 * (v))))
|
| 116 | | -#define VICSWPRIORITYMASK(v) (*((uint32_t volatile*)(0x38E00024 + 0x1000 * (v))))
|
| 117 | | -#define VICPRIORITYDAISY(v) (*((uint32_t volatile*)(0x38E00028 + 0x1000 * (v))))
|
| 118 | | -#define VICVECTADDR(v, i) (*((uint32_t volatile*)(0x38E00100 + 0x1000 * (v) + 4 * (i))))
|
| 119 | | -#define VICVECTPRIORITY(v, i) (*((uint32_t volatile*)(0x38E00200 + 0x1000 * (v) + 4 * (i))))
|
| 120 | | -#define VICADDRESS(v) (*((const void* volatile*)(0x38E00F00 + 0x1000 * (v))))
|
| 121 | | -#define VIC0IRQSTATUS (*((uint32_t volatile*)(0x38E00000)))
|
| 122 | | -#define VIC0FIQSTATUS (*((uint32_t volatile*)(0x38E00004)))
|
| 123 | | -#define VIC0RAWINTR (*((uint32_t volatile*)(0x38E00008)))
|
| 124 | | -#define VIC0INTSELECT (*((uint32_t volatile*)(0x38E0000C)))
|
| 125 | | -#define VIC0INTENABLE (*((uint32_t volatile*)(0x38E00010)))
|
| 126 | | -#define VIC0INTENCLEAR (*((uint32_t volatile*)(0x38E00014)))
|
| 127 | | -#define VIC0SOFTINT (*((uint32_t volatile*)(0x38E00018)))
|
| 128 | | -#define VIC0SOFTINTCLEAR (*((uint32_t volatile*)(0x38E0001C)))
|
| 129 | | -#define VIC0PROTECTION (*((uint32_t volatile*)(0x38E00020)))
|
| 130 | | -#define VIC0SWPRIORITYMASK (*((uint32_t volatile*)(0x38E00024)))
|
| 131 | | -#define VIC0PRIORITYDAISY (*((uint32_t volatile*)(0x38E00028)))
|
| 132 | | -#define VIC0VECTADDR(i) (*((const void* volatile*)(0x38E00100 + 4 * (i))))
|
| 133 | | -#define VIC0VECTADDR0 (*((const void* volatile*)(0x38E00100)))
|
| 134 | | -#define VIC0VECTADDR1 (*((const void* volatile*)(0x38E00104)))
|
| 135 | | -#define VIC0VECTADDR2 (*((const void* volatile*)(0x38E00108)))
|
| 136 | | -#define VIC0VECTADDR3 (*((const void* volatile*)(0x38E0010C)))
|
| 137 | | -#define VIC0VECTADDR4 (*((const void* volatile*)(0x38E00110)))
|
| 138 | | -#define VIC0VECTADDR5 (*((const void* volatile*)(0x38E00114)))
|
| 139 | | -#define VIC0VECTADDR6 (*((const void* volatile*)(0x38E00118)))
|
| 140 | | -#define VIC0VECTADDR7 (*((const void* volatile*)(0x38E0011C)))
|
| 141 | | -#define VIC0VECTADDR8 (*((const void* volatile*)(0x38E00120)))
|
| 142 | | -#define VIC0VECTADDR9 (*((const void* volatile*)(0x38E00124)))
|
| 143 | | -#define VIC0VECTADDR10 (*((const void* volatile*)(0x38E00128)))
|
| 144 | | -#define VIC0VECTADDR11 (*((const void* volatile*)(0x38E0012C)))
|
| 145 | | -#define VIC0VECTADDR12 (*((const void* volatile*)(0x38E00130)))
|
| 146 | | -#define VIC0VECTADDR13 (*((const void* volatile*)(0x38E00134)))
|
| 147 | | -#define VIC0VECTADDR14 (*((const void* volatile*)(0x38E00138)))
|
| 148 | | -#define VIC0VECTADDR15 (*((const void* volatile*)(0x38E0013C)))
|
| 149 | | -#define VIC0VECTADDR16 (*((const void* volatile*)(0x38E00140)))
|
| 150 | | -#define VIC0VECTADDR17 (*((const void* volatile*)(0x38E00144)))
|
| 151 | | -#define VIC0VECTADDR18 (*((const void* volatile*)(0x38E00148)))
|
| 152 | | -#define VIC0VECTADDR19 (*((const void* volatile*)(0x38E0014C)))
|
| 153 | | -#define VIC0VECTADDR20 (*((const void* volatile*)(0x38E00150)))
|
| 154 | | -#define VIC0VECTADDR21 (*((const void* volatile*)(0x38E00154)))
|
| 155 | | -#define VIC0VECTADDR22 (*((const void* volatile*)(0x38E00158)))
|
| 156 | | -#define VIC0VECTADDR23 (*((const void* volatile*)(0x38E0015C)))
|
| 157 | | -#define VIC0VECTADDR24 (*((const void* volatile*)(0x38E00160)))
|
| 158 | | -#define VIC0VECTADDR25 (*((const void* volatile*)(0x38E00164)))
|
| 159 | | -#define VIC0VECTADDR26 (*((const void* volatile*)(0x38E00168)))
|
| 160 | | -#define VIC0VECTADDR27 (*((const void* volatile*)(0x38E0016C)))
|
| 161 | | -#define VIC0VECTADDR28 (*((const void* volatile*)(0x38E00170)))
|
| 162 | | -#define VIC0VECTADDR29 (*((const void* volatile*)(0x38E00174)))
|
| 163 | | -#define VIC0VECTADDR30 (*((const void* volatile*)(0x38E00178)))
|
| 164 | | -#define VIC0VECTADDR31 (*((const void* volatile*)(0x38E0017C)))
|
| 165 | | -#define VIC0VECTPRIORITY(i) (*((uint32_t volatile*)(0x38E00200 + 4 * (i))))
|
| 166 | | -#define VIC0VECTPRIORITY0 (*((uint32_t volatile*)(0x38E00200)))
|
| 167 | | -#define VIC0VECTPRIORITY1 (*((uint32_t volatile*)(0x38E00204)))
|
| 168 | | -#define VIC0VECTPRIORITY2 (*((uint32_t volatile*)(0x38E00208)))
|
| 169 | | -#define VIC0VECTPRIORITY3 (*((uint32_t volatile*)(0x38E0020C)))
|
| 170 | | -#define VIC0VECTPRIORITY4 (*((uint32_t volatile*)(0x38E00210)))
|
| 171 | | -#define VIC0VECTPRIORITY5 (*((uint32_t volatile*)(0x38E00214)))
|
| 172 | | -#define VIC0VECTPRIORITY6 (*((uint32_t volatile*)(0x38E00218)))
|
| 173 | | -#define VIC0VECTPRIORITY7 (*((uint32_t volatile*)(0x38E0021C)))
|
| 174 | | -#define VIC0VECTPRIORITY8 (*((uint32_t volatile*)(0x38E00220)))
|
| 175 | | -#define VIC0VECTPRIORITY9 (*((uint32_t volatile*)(0x38E00224)))
|
| 176 | | -#define VIC0VECTPRIORITY10 (*((uint32_t volatile*)(0x38E00228)))
|
| 177 | | -#define VIC0VECTPRIORITY11 (*((uint32_t volatile*)(0x38E0022C)))
|
| 178 | | -#define VIC0VECTPRIORITY12 (*((uint32_t volatile*)(0x38E00230)))
|
| 179 | | -#define VIC0VECTPRIORITY13 (*((uint32_t volatile*)(0x38E00234)))
|
| 180 | | -#define VIC0VECTPRIORITY14 (*((uint32_t volatile*)(0x38E00238)))
|
| 181 | | -#define VIC0VECTPRIORITY15 (*((uint32_t volatile*)(0x38E0023C)))
|
| 182 | | -#define VIC0VECTPRIORITY16 (*((uint32_t volatile*)(0x38E00240)))
|
| 183 | | -#define VIC0VECTPRIORITY17 (*((uint32_t volatile*)(0x38E00244)))
|
| 184 | | -#define VIC0VECTPRIORITY18 (*((uint32_t volatile*)(0x38E00248)))
|
| 185 | | -#define VIC0VECTPRIORITY19 (*((uint32_t volatile*)(0x38E0024C)))
|
| 186 | | -#define VIC0VECTPRIORITY20 (*((uint32_t volatile*)(0x38E00250)))
|
| 187 | | -#define VIC0VECTPRIORITY21 (*((uint32_t volatile*)(0x38E00254)))
|
| 188 | | -#define VIC0VECTPRIORITY22 (*((uint32_t volatile*)(0x38E00258)))
|
| 189 | | -#define VIC0VECTPRIORITY23 (*((uint32_t volatile*)(0x38E0025C)))
|
| 190 | | -#define VIC0VECTPRIORITY24 (*((uint32_t volatile*)(0x38E00260)))
|
| 191 | | -#define VIC0VECTPRIORITY25 (*((uint32_t volatile*)(0x38E00264)))
|
| 192 | | -#define VIC0VECTPRIORITY26 (*((uint32_t volatile*)(0x38E00268)))
|
| 193 | | -#define VIC0VECTPRIORITY27 (*((uint32_t volatile*)(0x38E0026C)))
|
| 194 | | -#define VIC0VECTPRIORITY28 (*((uint32_t volatile*)(0x38E00270)))
|
| 195 | | -#define VIC0VECTPRIORITY29 (*((uint32_t volatile*)(0x38E00274)))
|
| 196 | | -#define VIC0VECTPRIORITY30 (*((uint32_t volatile*)(0x38E00278)))
|
| 197 | | -#define VIC0VECTPRIORITY31 (*((uint32_t volatile*)(0x38E0027C)))
|
| 198 | | -#define VIC0ADDRESS (*((void* volatile*)(0x38E00F00)))
|
| 199 | | -#define VIC1IRQSTATUS (*((uint32_t volatile*)(0x38E01000)))
|
| 200 | | -#define VIC1FIQSTATUS (*((uint32_t volatile*)(0x38E01004)))
|
| 201 | | -#define VIC1RAWINTR (*((uint32_t volatile*)(0x38E01008)))
|
| 202 | | -#define VIC1INTSELECT (*((uint32_t volatile*)(0x38E0100C)))
|
| 203 | | -#define VIC1INTENABLE (*((uint32_t volatile*)(0x38E01010)))
|
| 204 | | -#define VIC1INTENCLEAR (*((uint32_t volatile*)(0x38E01014)))
|
| 205 | | -#define VIC1SOFTINT (*((uint32_t volatile*)(0x38E01018)))
|
| 206 | | -#define VIC1SOFTINTCLEAR (*((uint32_t volatile*)(0x38E0101C)))
|
| 207 | | -#define VIC1PROTECTION (*((uint32_t volatile*)(0x38E01020)))
|
| 208 | | -#define VIC1SWPRIORITYMASK (*((uint32_t volatile*)(0x38E01024)))
|
| 209 | | -#define VIC1PRIORITYDAISY (*((uint32_t volatile*)(0x38E01028)))
|
| 210 | | -#define VIC1VECTADDR(i) (*((const void* volatile*)(0x38E01100 + 4 * (i))))
|
| 211 | | -#define VIC1VECTADDR0 (*((const void* volatile*)(0x38E01100)))
|
| 212 | | -#define VIC1VECTADDR1 (*((const void* volatile*)(0x38E01104)))
|
| 213 | | -#define VIC1VECTADDR2 (*((const void* volatile*)(0x38E01108)))
|
| 214 | | -#define VIC1VECTADDR3 (*((const void* volatile*)(0x38E0110C)))
|
| 215 | | -#define VIC1VECTADDR4 (*((const void* volatile*)(0x38E01110)))
|
| 216 | | -#define VIC1VECTADDR5 (*((const void* volatile*)(0x38E01114)))
|
| 217 | | -#define VIC1VECTADDR6 (*((const void* volatile*)(0x38E01118)))
|
| 218 | | -#define VIC1VECTADDR7 (*((const void* volatile*)(0x38E0111C)))
|
| 219 | | -#define VIC1VECTADDR8 (*((const void* volatile*)(0x38E01120)))
|
| 220 | | -#define VIC1VECTADDR9 (*((const void* volatile*)(0x38E01124)))
|
| 221 | | -#define VIC1VECTADDR10 (*((const void* volatile*)(0x38E01128)))
|
| 222 | | -#define VIC1VECTADDR11 (*((const void* volatile*)(0x38E0112C)))
|
| 223 | | -#define VIC1VECTADDR12 (*((const void* volatile*)(0x38E01130)))
|
| 224 | | -#define VIC1VECTADDR13 (*((const void* volatile*)(0x38E01134)))
|
| 225 | | -#define VIC1VECTADDR14 (*((const void* volatile*)(0x38E01138)))
|
| 226 | | -#define VIC1VECTADDR15 (*((const void* volatile*)(0x38E0113C)))
|
| 227 | | -#define VIC1VECTADDR16 (*((const void* volatile*)(0x38E01140)))
|
| 228 | | -#define VIC1VECTADDR17 (*((const void* volatile*)(0x38E01144)))
|
| 229 | | -#define VIC1VECTADDR18 (*((const void* volatile*)(0x38E01148)))
|
| 230 | | -#define VIC1VECTADDR19 (*((const void* volatile*)(0x38E0114C)))
|
| 231 | | -#define VIC1VECTADDR20 (*((const void* volatile*)(0x38E01150)))
|
| 232 | | -#define VIC1VECTADDR21 (*((const void* volatile*)(0x38E01154)))
|
| 233 | | -#define VIC1VECTADDR22 (*((const void* volatile*)(0x38E01158)))
|
| 234 | | -#define VIC1VECTADDR23 (*((const void* volatile*)(0x38E0115C)))
|
| 235 | | -#define VIC1VECTADDR24 (*((const void* volatile*)(0x38E01160)))
|
| 236 | | -#define VIC1VECTADDR25 (*((const void* volatile*)(0x38E01164)))
|
| 237 | | -#define VIC1VECTADDR26 (*((const void* volatile*)(0x38E01168)))
|
| 238 | | -#define VIC1VECTADDR27 (*((const void* volatile*)(0x38E0116C)))
|
| 239 | | -#define VIC1VECTADDR28 (*((const void* volatile*)(0x38E01170)))
|
| 240 | | -#define VIC1VECTADDR29 (*((const void* volatile*)(0x38E01174)))
|
| 241 | | -#define VIC1VECTADDR30 (*((const void* volatile*)(0x38E01178)))
|
| 242 | | -#define VIC1VECTADDR31 (*((const void* volatile*)(0x38E0117C)))
|
| 243 | | -#define VIC1VECTPRIORITY(i) (*((uint32_t volatile*)(0x38E01200 + 4 * (i))))
|
| 244 | | -#define VIC1VECTPRIORITY0 (*((uint32_t volatile*)(0x38E01200)))
|
| 245 | | -#define VIC1VECTPRIORITY1 (*((uint32_t volatile*)(0x38E01204)))
|
| 246 | | -#define VIC1VECTPRIORITY2 (*((uint32_t volatile*)(0x38E01208)))
|
| 247 | | -#define VIC1VECTPRIORITY3 (*((uint32_t volatile*)(0x38E0120C)))
|
| 248 | | -#define VIC1VECTPRIORITY4 (*((uint32_t volatile*)(0x38E01210)))
|
| 249 | | -#define VIC1VECTPRIORITY5 (*((uint32_t volatile*)(0x38E01214)))
|
| 250 | | -#define VIC1VECTPRIORITY6 (*((uint32_t volatile*)(0x38E01218)))
|
| 251 | | -#define VIC1VECTPRIORITY7 (*((uint32_t volatile*)(0x38E0121C)))
|
| 252 | | -#define VIC1VECTPRIORITY8 (*((uint32_t volatile*)(0x38E01220)))
|
| 253 | | -#define VIC1VECTPRIORITY9 (*((uint32_t volatile*)(0x38E01224)))
|
| 254 | | -#define VIC1VECTPRIORITY10 (*((uint32_t volatile*)(0x38E01228)))
|
| 255 | | -#define VIC1VECTPRIORITY11 (*((uint32_t volatile*)(0x38E0122C)))
|
| 256 | | -#define VIC1VECTPRIORITY12 (*((uint32_t volatile*)(0x38E01230)))
|
| 257 | | -#define VIC1VECTPRIORITY13 (*((uint32_t volatile*)(0x38E01234)))
|
| 258 | | -#define VIC1VECTPRIORITY14 (*((uint32_t volatile*)(0x38E01238)))
|
| 259 | | -#define VIC1VECTPRIORITY15 (*((uint32_t volatile*)(0x38E0123C)))
|
| 260 | | -#define VIC1VECTPRIORITY16 (*((uint32_t volatile*)(0x38E01240)))
|
| 261 | | -#define VIC1VECTPRIORITY17 (*((uint32_t volatile*)(0x38E01244)))
|
| 262 | | -#define VIC1VECTPRIORITY18 (*((uint32_t volatile*)(0x38E01248)))
|
| 263 | | -#define VIC1VECTPRIORITY19 (*((uint32_t volatile*)(0x38E0124C)))
|
| 264 | | -#define VIC1VECTPRIORITY20 (*((uint32_t volatile*)(0x38E01250)))
|
| 265 | | -#define VIC1VECTPRIORITY21 (*((uint32_t volatile*)(0x38E01254)))
|
| 266 | | -#define VIC1VECTPRIORITY22 (*((uint32_t volatile*)(0x38E01258)))
|
| 267 | | -#define VIC1VECTPRIORITY23 (*((uint32_t volatile*)(0x38E0125C)))
|
| 268 | | -#define VIC1VECTPRIORITY24 (*((uint32_t volatile*)(0x38E01260)))
|
| 269 | | -#define VIC1VECTPRIORITY25 (*((uint32_t volatile*)(0x38E01264)))
|
| 270 | | -#define VIC1VECTPRIORITY26 (*((uint32_t volatile*)(0x38E01268)))
|
| 271 | | -#define VIC1VECTPRIORITY27 (*((uint32_t volatile*)(0x38E0126C)))
|
| 272 | | -#define VIC1VECTPRIORITY28 (*((uint32_t volatile*)(0x38E01270)))
|
| 273 | | -#define VIC1VECTPRIORITY29 (*((uint32_t volatile*)(0x38E01274)))
|
| 274 | | -#define VIC1VECTPRIORITY30 (*((uint32_t volatile*)(0x38E01278)))
|
| 275 | | -#define VIC1VECTPRIORITY31 (*((uint32_t volatile*)(0x38E0127C)))
|
| 276 | | -#define VIC1ADDRESS (*((void* volatile*)(0x38E01F00)))
|
| 277 | | -
|
| 278 | | -
|
| 279 | | -/////GPIO/////
|
| 280 | | -#define PCON(i) (*((uint32_t volatile*)(0x3cf00000 + ((i) << 5))))
|
| 281 | | -#define PDAT(i) (*((uint32_t volatile*)(0x3cf00004 + ((i) << 5))))
|
| 282 | | -#define PUNA(i) (*((uint32_t volatile*)(0x3cf00008 + ((i) << 5))))
|
| 283 | | -#define PUNB(i) (*((uint32_t volatile*)(0x3cf0000c + ((i) << 5))))
|
| 284 | | -#define PCON0 (*((uint32_t volatile*)(0x3cf00000)))
|
| 285 | | -#define PDAT0 (*((uint32_t volatile*)(0x3cf00004)))
|
| 286 | | -#define PCON1 (*((uint32_t volatile*)(0x3cf00020)))
|
| 287 | | -#define PDAT1 (*((uint32_t volatile*)(0x3cf00024)))
|
| 288 | | -#define PCON2 (*((uint32_t volatile*)(0x3cf00040)))
|
| 289 | | -#define PDAT2 (*((uint32_t volatile*)(0x3cf00044)))
|
| 290 | | -#define PCON3 (*((uint32_t volatile*)(0x3cf00060)))
|
| 291 | | -#define PDAT3 (*((uint32_t volatile*)(0x3cf00064)))
|
| 292 | | -#define PCON4 (*((uint32_t volatile*)(0x3cf00080)))
|
| 293 | | -#define PDAT4 (*((uint32_t volatile*)(0x3cf00084)))
|
| 294 | | -#define PCON5 (*((uint32_t volatile*)(0x3cf000a0)))
|
| 295 | | -#define PDAT5 (*((uint32_t volatile*)(0x3cf000a4)))
|
| 296 | | -#define PCON6 (*((uint32_t volatile*)(0x3cf000c0)))
|
| 297 | | -#define PDAT6 (*((uint32_t volatile*)(0x3cf000c4)))
|
| 298 | | -#define PCON7 (*((uint32_t volatile*)(0x3cf000e0)))
|
| 299 | | -#define PDAT7 (*((uint32_t volatile*)(0x3cf000e4)))
|
| 300 | | -#define PCON8 (*((uint32_t volatile*)(0x3cf00100)))
|
| 301 | | -#define PDAT8 (*((uint32_t volatile*)(0x3cf00104)))
|
| 302 | | -#define PCON9 (*((uint32_t volatile*)(0x3cf00120)))
|
| 303 | | -#define PDAT9 (*((uint32_t volatile*)(0x3cf00124)))
|
| 304 | | -#define PCONA (*((uint32_t volatile*)(0x3cf00140)))
|
| 305 | | -#define PDATA (*((uint32_t volatile*)(0x3cf00144)))
|
| 306 | | -#define PCONB (*((uint32_t volatile*)(0x3cf00160)))
|
| 307 | | -#define PDATB (*((uint32_t volatile*)(0x3cf00164)))
|
| 308 | | -#define PCONC (*((uint32_t volatile*)(0x3cf00180)))
|
| 309 | | -#define PDATC (*((uint32_t volatile*)(0x3cf00184)))
|
| 310 | | -#define PCOND (*((uint32_t volatile*)(0x3cf001a0)))
|
| 311 | | -#define PDATD (*((uint32_t volatile*)(0x3cf001a4)))
|
| 312 | | -#define PCONE (*((uint32_t volatile*)(0x3cf001c0)))
|
| 313 | | -#define PDATE (*((uint32_t volatile*)(0x3cf001c4)))
|
| 314 | | -#define PCONF (*((uint32_t volatile*)(0x3cf001e0)))
|
| 315 | | -#define PDATF (*((uint32_t volatile*)(0x3cf001e4)))
|
| 316 | | -#define GPIOCMD (*((uint32_t volatile*)(0x3cf00200)))
|
| 317 | | -
|
| 318 | | -
|
| 319 | | -/////SPI/////
|
| 320 | | -#define SPIBASE(i) ((i) == 2 ? 0x3d200000 : \
|
| 321 | | - (i) == 1 ? 0x3ce00000 : \
|
| 322 | | - 0x3c300000)
|
| 323 | | -#define SPICLKGATE(i) ((i) == 2 ? 0x2f : \
|
| 324 | | - (i) == 1 ? 0x2b : \
|
| 325 | | - 0x22)
|
| 326 | | -#define SPIDMA(i) ((i) == 2 ? 0xd : \
|
| 327 | | - (i) == 1 ? 0xf : \
|
| 328 | | - 0x5)
|
| 329 | | -#define SPICTRL(i) (*((uint32_t volatile*)(SPIBASE(i))))
|
| 330 | | -#define SPISETUP(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x4)))
|
| 331 | | -#define SPISTATUS(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x8)))
|
| 332 | | -#define SPIUNKREG1(i) (*((uint32_t volatile*)(SPIBASE(i) + 0xc)))
|
| 333 | | -#define SPITXDATA(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x10)))
|
| 334 | | -#define SPIRXDATA(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x20)))
|
| 335 | | -#define SPICLKDIV(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x30)))
|
| 336 | | -#define SPIRXLIMIT(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x34)))
|
| 337 | | -#define SPIUNKREG3(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x38)))
|
| 338 | | -
|
| 339 | | -
|
| 340 | | -/////AES/////
|
| 341 | | -#define AESCONTROL (*((uint32_t volatile*)(0x38c00000)))
|
| 342 | | -#define AESGO (*((uint32_t volatile*)(0x38c00004)))
|
| 343 | | -#define AESUNKREG0 (*((uint32_t volatile*)(0x38c00008)))
|
| 344 | | -#define AESSTATUS (*((uint32_t volatile*)(0x38c0000c)))
|
| 345 | | -#define AESUNKREG1 (*((uint32_t volatile*)(0x38c00010)))
|
| 346 | | -#define AESKEYLEN (*((uint32_t volatile*)(0x38c00014)))
|
| 347 | | -#define AESOUTSIZE (*((uint32_t volatile*)(0x38c00018)))
|
| 348 | | -#define AESOUTADDR (*((void* volatile*)(0x38c00020)))
|
| 349 | | -#define AESINSIZE (*((uint32_t volatile*)(0x38c00024)))
|
| 350 | | -#define AESINADDR (*((const void* volatile*)(0x38c00028)))
|
| 351 | | -#define AESAUXSIZE (*((uint32_t volatile*)(0x38c0002c)))
|
| 352 | | -#define AESAUXADDR (*((void* volatile*)(0x38c00030)))
|
| 353 | | -#define AESSIZE3 (*((uint32_t volatile*)(0x38c00034)))
|
| 354 | | -#define AESKEY ((uint32_t volatile*)(0x38c0004c))
|
| 355 | | -#define AESTYPE (*((uint32_t volatile*)(0x38c0006c)))
|
| 356 | | -#define AESIV ((uint32_t volatile*)(0x38c00074))
|
| 357 | | -#define AESTYPE2 (*((uint32_t volatile*)(0x38c00088)))
|
| 358 | | -#define AESUNKREG2 (*((uint32_t volatile*)(0x38c0008c)))
|
| 359 | | -
|
| 360 | | -
|
| 361 | | -/////SHA1/////
|
| 362 | | -#define SHA1CONFIG (*((uint32_t volatile*)(0x38000000)))
|
| 363 | | -#define SHA1RESET (*((uint32_t volatile*)(0x38000004)))
|
| 364 | | -#define SHA1RESULT ((uint32_t volatile*)(0x38000020))
|
| 365 | | -#define SHA1DATAIN ((uint32_t volatile*)(0x38000040))
|
| 366 | | -
|
| 367 | | -
|
| 368 | | -/////DMA/////
|
| 369 | | -struct dma_lli
|
| 370 | | -{
|
| 371 | | - void* srcaddr;
|
| 372 | | - void* dstaddr;
|
| 373 | | - const struct dma_lli* nextlli;
|
| 374 | | - uint32_t control;
|
| 375 | | -};
|
| 376 | | -#define DMACINTSTS(d) (*((uint32_t volatile*)(0x38200000 + 0x1700000 * (d))))
|
| 377 | | -#define DMACINTTCSTS(d) (*((uint32_t volatile*)(0x38200004 + 0x1700000 * (d))))
|
| 378 | | -#define DMACINTTCCLR(d) (*((uint32_t volatile*)(0x38200008 + 0x1700000 * (d))))
|
| 379 | | -#define DMACINTERRSTS(d) (*((uint32_t volatile*)(0x3820000c + 0x1700000 * (d))))
|
| 380 | | -#define DMACINTERRCLR(d) (*((uint32_t volatile*)(0x38200010 + 0x1700000 * (d))))
|
| 381 | | -#define DMACRAWINTTCSTS(d) (*((uint32_t volatile*)(0x38200014 + 0x1700000 * (d))))
|
| 382 | | -#define DMACRAWINTERRSTS(d) (*((uint32_t volatile*)(0x38200018 + 0x1700000 * (d))))
|
| 383 | | -#define DMACENABLEDCHANS(d) (*((uint32_t volatile*)(0x3820001c + 0x1700000 * (d))))
|
| 384 | | -#define DMACSOFTBREQ(d) (*((uint32_t volatile*)(0x38200020 + 0x1700000 * (d))))
|
| 385 | | -#define DMACSOFTSREQ(d) (*((uint32_t volatile*)(0x38200024 + 0x1700000 * (d))))
|
| 386 | | -#define DMACSOFTLBREQ(d) (*((uint32_t volatile*)(0x38200028 + 0x1700000 * (d))))
|
| 387 | | -#define DMACSOFTLSREQ(d) (*((uint32_t volatile*)(0x3820002c + 0x1700000 * (d))))
|
| 388 | | -#define DMACCONFIG(d) (*((uint32_t volatile*)(0x38200030 + 0x1700000 * (d))))
|
| 389 | | -#define DMACSYNC(d) (*((uint32_t volatile*)(0x38200034 + 0x1700000 * (d))))
|
| 390 | | -#define DMACCLLI(d, c) (*((struct dma_lli volatile*)(0x38200100 + 0x1700000 * (d) + 0x20 * (c))))
|
| 391 | | -#define DMACCSRCADDR(d, c) (*((const void* volatile*)(0x38200100 + 0x1700000 * (d) + 0x20 * (c))))
|
| 392 | | -#define DMACCDESTADDR(d, c) (*((void* volatile*)(0x38200104 + 0x1700000 * (d) + 0x20 * (c))))
|
| 393 | | -#define DMACCNEXTLLI(d, c) (*((const void* volatile*)(0x38200108 + 0x1700000 * (d) + 0x20 * (c))))
|
| 394 | | -#define DMACCCONTROL(d, c) (*((uint32_t volatile*)(0x3820010c + 0x1700000 * (d) + 0x20 * (c))))
|
| 395 | | -#define DMACCCONFIG(d, c) (*((uint32_t volatile*)(0x38200110 + 0x1700000 * (d) + 0x20 * (c))))
|
| 396 | | -#define DMAC0INTSTS (*((uint32_t volatile*)(0x38200000)))
|
| 397 | | -#define DMAC0INTTCSTS (*((uint32_t volatile*)(0x38200004)))
|
| 398 | | -#define DMAC0INTTCCLR (*((uint32_t volatile*)(0x38200008)))
|
| 399 | | -#define DMAC0INTERRSTS (*((uint32_t volatile*)(0x3820000c)))
|
| 400 | | -#define DMAC0INTERRCLR (*((uint32_t volatile*)(0x38200010)))
|
| 401 | | -#define DMAC0RAWINTTCSTS (*((uint32_t volatile*)(0x38200014)))
|
| 402 | | -#define DMAC0RAWINTERRSTS (*((uint32_t volatile*)(0x38200018)))
|
| 403 | | -#define DMAC0ENABLEDCHANS (*((uint32_t volatile*)(0x3820001c)))
|
| 404 | | -#define DMAC0SOFTBREQ (*((uint32_t volatile*)(0x38200020)))
|
| 405 | | -#define DMAC0SOFTSREQ (*((uint32_t volatile*)(0x38200024)))
|
| 406 | | -#define DMAC0SOFTLBREQ (*((uint32_t volatile*)(0x38200028)))
|
| 407 | | -#define DMAC0SOFTLSREQ (*((uint32_t volatile*)(0x3820002c)))
|
| 408 | | -#define DMAC0CONFIG (*((uint32_t volatile*)(0x38200030)))
|
| 409 | | -#define DMAC0SYNC (*((uint32_t volatile*)(0x38200034)))
|
| 410 | | -#define DMAC0CLLI(c) (*((struct dma_lli volatile*)(0x38200100 + 0x20 * (c))))
|
| 411 | | -#define DMAC0CSRCADDR(c) (*((const void* volatile*)(0x38200100 + 0x20 * (c))))
|
| 412 | | -#define DMAC0CDESTADDR(c) (*((void* volatile*)(0x38200104 + 0x20 * (c))))
|
| 413 | | -#define DMAC0CNEXTLLI(c) (*((const void* volatile*)(0x38200108 + 0x20 * (c))))
|
| 414 | | -#define DMAC0CCONTROL(c) (*((uint32_t volatile*)(0x3820010c + 0x20 * (c))))
|
| 415 | | -#define DMAC0CCONFIG(c) (*((uint32_t volatile*)(0x38200110 + 0x20 * (c))))
|
| 416 | | -#define DMAC0C0LLI (*((struct dma_lli volatile*)(0x38200100)))
|
| 417 | | -#define DMAC0C0SRCADDR (*((const void* volatile*)(0x38200100)))
|
| 418 | | -#define DMAC0C0DESTADDR (*((void* volatile*)(0x38200104)))
|
| 419 | | -#define DMAC0C0NEXTLLI (*((const struct dma_lli* volatile*)(0x38200108)))
|
| 420 | | -#define DMAC0C0CONTROL (*((uint32_t volatile*)(0x3820010c)))
|
| 421 | | -#define DMAC0C0CONFIG (*((uint32_t volatile*)(0x38200110)))
|
| 422 | | -#define DMAC0C1LLI (*((struct dma_lli volatile*)(0x38200120)))
|
| 423 | | -#define DMAC0C1SRCADDR (*((const void* volatile*)(0x38200120)))
|
| 424 | | -#define DMAC0C1DESTADDR (*((void* volatile*)(0x38200124)))
|
| 425 | | -#define DMAC0C1NEXTLLI (*((const struct dma_lli* volatile*)(0x38200128)))
|
| 426 | | -#define DMAC0C1CONTROL (*((uint32_t volatile*)(0x3820012c)))
|
| 427 | | -#define DMAC0C1CONFIG (*((uint32_t volatile*)(0x38200130)))
|
| 428 | | -#define DMAC0C2LLI (*((struct dma_lli volatile*)(0x38200140)))
|
| 429 | | -#define DMAC0C2SRCADDR (*((const void* volatile*)(0x38200140)))
|
| 430 | | -#define DMAC0C2DESTADDR (*((void* volatile*)(0x38200144)))
|
| 431 | | -#define DMAC0C2NEXTLLI (*((const struct dma_lli* volatile*)(0x38200148)))
|
| 432 | | -#define DMAC0C2CONTROL (*((uint32_t volatile*)(0x3820014c)))
|
| 433 | | -#define DMAC0C2CONFIG (*((uint32_t volatile*)(0x38200150)))
|
| 434 | | -#define DMAC0C3LLI (*((struct dma_lli volatile*)(0x38200160)))
|
| 435 | | -#define DMAC0C3SRCADDR (*((const void* volatile*)(0x38200160)))
|
| 436 | | -#define DMAC0C3DESTADDR (*((void* volatile*)(0x38200164)))
|
| 437 | | -#define DMAC0C3NEXTLLI (*((const struct dma_lli* volatile*)(0x38200168)))
|
| 438 | | -#define DMAC0C3CONTROL (*((uint32_t volatile*)(0x3820016c)))
|
| 439 | | -#define DMAC0C3CONFIG (*((uint32_t volatile*)(0x38200170)))
|
| 440 | | -#define DMAC0C4LLI (*((struct dma_lli volatile*)(0x38200180)))
|
| 441 | | -#define DMAC0C4SRCADDR (*((const void* volatile*)(0x38200180)))
|
| 442 | | -#define DMAC0C4DESTADDR (*((void* volatile*)(0x38200184)))
|
| 443 | | -#define DMAC0C4NEXTLLI (*((const struct dma_lli* volatile*)(0x38200188)))
|
| 444 | | -#define DMAC0C4CONTROL (*((uint32_t volatile*)(0x3820018c)))
|
| 445 | | -#define DMAC0C4CONFIG (*((uint32_t volatile*)(0x38200190)))
|
| 446 | | -#define DMAC0C5LLI (*((struct dma_lli volatile*)(0x382001a0)))
|
| 447 | | -#define DMAC0C5SRCADDR (*((const void* volatile*)(0x382001a0)))
|
| 448 | | -#define DMAC0C5DESTADDR (*((void* volatile*)(0x382001a4)))
|
| 449 | | -#define DMAC0C5NEXTLLI (*((const struct dma_lli* volatile*)(0x382001a8)))
|
| 450 | | -#define DMAC0C5CONTROL (*((uint32_t volatile*)(0x382001ac)))
|
| 451 | | -#define DMAC0C5CONFIG (*((uint32_t volatile*)(0x382001b0)))
|
| 452 | | -#define DMAC0C6LLI (*((struct dma_lli volatile*)(0x382001c0)))
|
| 453 | | -#define DMAC0C6SRCADDR (*((const void* volatile*)(0x382001c0)))
|
| 454 | | -#define DMAC0C6DESTADDR (*((void* volatile*)(0x382001c4)))
|
| 455 | | -#define DMAC0C6NEXTLLI (*((const struct dma_lli* volatile*)(0x382001c8)))
|
| 456 | | -#define DMAC0C6CONTROL (*((uint32_t volatile*)(0x382001cc)))
|
| 457 | | -#define DMAC0C6CONFIG (*((uint32_t volatile*)(0x382001d0)))
|
| 458 | | -#define DMAC0C7LLI (*((struct dma_lli volatile*)(0x382001e0)))
|
| 459 | | -#define DMAC0C7SRCADDR (*((const void* volatile*)(0x382001e0)))
|
| 460 | | -#define DMAC0C7DESTADDR (*((void* volatile*)(0x382001e4)))
|
| 461 | | -#define DMAC0C7NEXTLLI (*((const struct dma_lli* volatile*)(0x382001e8)))
|
| 462 | | -#define DMAC0C7CONTROL (*((uint32_t volatile*)(0x382001ec)))
|
| 463 | | -#define DMAC0C7CONFIG (*((uint32_t volatile*)(0x382001f0)))
|
| 464 | | -#define DMAC1INTSTS (*((uint32_t volatile*)(0x39900000)))
|
| 465 | | -#define DMAC1INTTCSTS (*((uint32_t volatile*)(0x39900004)))
|
| 466 | | -#define DMAC1INTTCCLR (*((uint32_t volatile*)(0x39900008)))
|
| 467 | | -#define DMAC1INTERRSTS (*((uint32_t volatile*)(0x3990000c)))
|
| 468 | | -#define DMAC1INTERRCLR (*((uint32_t volatile*)(0x39900010)))
|
| 469 | | -#define DMAC1RAWINTTCSTS (*((uint32_t volatile*)(0x39900014)))
|
| 470 | | -#define DMAC1RAWINTERRSTS (*((uint32_t volatile*)(0x39900018)))
|
| 471 | | -#define DMAC1ENABLEDCHANS (*((uint32_t volatile*)(0x3990001c)))
|
| 472 | | -#define DMAC1SOFTBREQ (*((uint32_t volatile*)(0x39900020)))
|
| 473 | | -#define DMAC1SOFTSREQ (*((uint32_t volatile*)(0x39900024)))
|
| 474 | | -#define DMAC1SOFTLBREQ (*((uint32_t volatile*)(0x39900028)))
|
| 475 | | -#define DMAC1SOFTLSREQ (*((uint32_t volatile*)(0x3990002c)))
|
| 476 | | -#define DMAC1CONFIG (*((uint32_t volatile*)(0x39900030)))
|
| 477 | | -#define DMAC1SYNC (*((uint32_t volatile*)(0x39900034)))
|
| 478 | | -#define DMAC1CLLI(c) (*((struct dma_lli volatile*)(0x39900100 + 0x20 * (c))))
|
| 479 | | -#define DMAC1CSRCADDR(c) (*((const void* volatile*)(0x39900100 + 0x20 * (c))))
|
| 480 | | -#define DMAC1CDESTADDR(c) (*((void* volatile*)(0x39900104 + 0x20 * (c))))
|
| 481 | | -#define DMAC1CNEXTLLI(c) (*((const void* volatile*)(0x39900108 + 0x20 * (c))))
|
| 482 | | -#define DMAC1CCONTROL(c) (*((uint32_t volatile*)(0x3990010c + 0x20 * (c))))
|
| 483 | | -#define DMAC1CCONFIG(c) (*((uint32_t volatile*)(0x39900110 + 0x20 * (c))))
|
| 484 | | -#define DMAC1C0LLI (*((struct dma_lli volatile*)(0x39900100)))
|
| 485 | | -#define DMAC1C0SRCADDR (*((const void* volatile*)(0x39900100)))
|
| 486 | | -#define DMAC1C0DESTADDR (*((void* volatile*)(0x39900104)))
|
| 487 | | -#define DMAC1C0NEXTLLI (*((const struct dma_lli* volatile*)(0x39900108)))
|
| 488 | | -#define DMAC1C0CONTROL (*((uint32_t volatile*)(0x3990010c)))
|
| 489 | | -#define DMAC1C0CONFIG (*((uint32_t volatile*)(0x39900110)))
|
| 490 | | -#define DMAC1C1LLI (*((struct dma_lli volatile*)(0x39900120)))
|
| 491 | | -#define DMAC1C1SRCADDR (*((const void* volatile*)(0x39900120)))
|
| 492 | | -#define DMAC1C1DESTADDR (*((void* volatile*)(0x39900124)))
|
| 493 | | -#define DMAC1C1NEXTLLI (*((const struct dma_lli* volatile*)(0x39900128)))
|
| 494 | | -#define DMAC1C1CONTROL (*((uint32_t volatile*)(0x3990012c)))
|
| 495 | | -#define DMAC1C1CONFIG (*((uint32_t volatile*)(0x39900130)))
|
| 496 | | -#define DMAC1C2LLI (*((struct dma_lli volatile*)(0x39900140)))
|
| 497 | | -#define DMAC1C2SRCADDR (*((const void* volatile*)(0x39900140)))
|
| 498 | | -#define DMAC1C2DESTADDR (*((void* volatile*)(0x39900144)))
|
| 499 | | -#define DMAC1C2NEXTLLI (*((const struct dma_lli* volatile*)(0x39900148)))
|
| 500 | | -#define DMAC1C2CONTROL (*((uint32_t volatile*)(0x3990014c)))
|
| 501 | | -#define DMAC1C2CONFIG (*((uint32_t volatile*)(0x39900150)))
|
| 502 | | -#define DMAC1C3LLI (*((struct dma_lli volatile*)(0x39900160)))
|
| 503 | | -#define DMAC1C3SRCADDR (*((const void* volatile*)(0x39900160)))
|
| 504 | | -#define DMAC1C3DESTADDR (*((void* volatile*)(0x39900164)))
|
| 505 | | -#define DMAC1C3NEXTLLI (*((volatile void**)(0x39900168)))
|
| 506 | | -#define DMAC1C3CONTROL (*((uint32_t volatile*)(0x3990016c)))
|
| 507 | | -#define DMAC1C3CONFIG (*((uint32_t volatile*)(0x39900170)))
|
| 508 | | -#define DMAC1C4LLI (*((struct dma_lli volatile*)(0x39900180)))
|
| 509 | | -#define DMAC1C4SRCADDR (*((const void* volatile*)(0x39900180)))
|
| 510 | | -#define DMAC1C4DESTADDR (*((void* volatile*)(0x39900184)))
|
| 511 | | -#define DMAC1C4NEXTLLI (*((const struct dma_lli* volatile*)(0x39900188)))
|
| 512 | | -#define DMAC1C4CONTROL (*((uint32_t volatile*)(0x3990018c)))
|
| 513 | | -#define DMAC1C4CONFIG (*((uint32_t volatile*)(0x39900190)))
|
| 514 | | -#define DMAC1C5LLI (*((struct dma_lli volatile*)(0x399001a0)))
|
| 515 | | -#define DMAC1C5SRCADDR (*((const void* volatile*)(0x399001a0)))
|
| 516 | | -#define DMAC1C5DESTADDR (*((void* volatile*)(0x399001a4)))
|
| 517 | | -#define DMAC1C5NEXTLLI (*((const struct dma_lli* volatile*)(0x399001a8)))
|
| 518 | | -#define DMAC1C5CONTROL (*((uint32_t volatile*)(0x399001ac)))
|
| 519 | | -#define DMAC1C5CONFIG (*((uint32_t volatile*)(0x399001b0)))
|
| 520 | | -#define DMAC1C6LLI (*((struct dma_lli volatile*)(0x399001c0)))
|
| 521 | | -#define DMAC1C6SRCADDR (*((const void* volatile*)(0x399001c0)))
|
| 522 | | -#define DMAC1C6DESTADDR (*((void* volatile*)(0x399001c4)))
|
| 523 | | -#define DMAC1C6NEXTLLI (*((const struct dma_lli* volatile*)(0x399001c8)))
|
| 524 | | -#define DMAC1C6CONTROL (*((uint32_t volatile*)(0x399001cc)))
|
| 525 | | -#define DMAC1C6CONFIG (*((uint32_t volatile*)(0x399001d0)))
|
| 526 | | -#define DMAC1C7LLI (*((struct dma_lli volatile*)(0x399001e0)))
|
| 527 | | -#define DMAC1C7SRCADDR (*((const void* volatile*)(0x399001e0)))
|
| 528 | | -#define DMAC1C7DESTADDR (*((void* volatile*)(0x399001e4)))
|
| 529 | | -#define DMAC1C7NEXTLLI (*((const struct dma_lli* volatile*)(0x399001e8)))
|
| 530 | | -#define DMAC1C7CONTROL (*((uint32_t volatile*)(0x399001ec)))
|
| 531 | | -#define DMAC1C7CONFIG (*((uint32_t volatile*)(0x399001f0)))
|
| 532 | | -
|
| 533 | | -
|
| 534 | | -/////LCD/////
|
| 535 | | -#define LCDWCMD (*((uint32_t volatile*)(0x38300004)))
|
| 536 | | -#define LCDSTATUS (*((uint32_t volatile*)(0x3830001c)))
|
| 537 | | -#define LCDWDATA (*((uint32_t volatile*)(0x38300040)))
|
| 538 | | -
|
| 539 | | -
|
| 540 | | -/////ATA/////
|
| 541 | | -#define ATA_CONTROL (*((uint32_t volatile*)(0x38700000)))
|
| 542 | | -#define ATA_STATUS (*((uint32_t volatile*)(0x38700004)))
|
| 543 | | -#define ATA_COMMAND (*((uint32_t volatile*)(0x38700008)))
|
| 544 | | -#define ATA_SWRST (*((uint32_t volatile*)(0x3870000c)))
|
| 545 | | -#define ATA_IRQ (*((uint32_t volatile*)(0x38700010)))
|
| 546 | | -#define ATA_IRQ_MASK (*((uint32_t volatile*)(0x38700014)))
|
| 547 | | -#define ATA_CFG (*((uint32_t volatile*)(0x38700018)))
|
| 548 | | -#define ATA_MDMA_TIME (*((uint32_t volatile*)(0x38700028)))
|
| 549 | | -#define ATA_PIO_TIME (*((uint32_t volatile*)(0x3870002c)))
|
| 550 | | -#define ATA_UDMA_TIME (*((uint32_t volatile*)(0x38700030)))
|
| 551 | | -#define ATA_XFR_NUM (*((uint32_t volatile*)(0x38700034)))
|
| 552 | | -#define ATA_XFR_CNT (*((uint32_t volatile*)(0x38700038)))
|
| 553 | | -#define ATA_TBUF_START (*((void* volatile*)(0x3870003c)))
|
| 554 | | -#define ATA_TBUF_SIZE (*((uint32_t volatile*)(0x38700040)))
|
| 555 | | -#define ATA_SBUF_START (*((void* volatile*)(0x38700044)))
|
| 556 | | -#define ATA_SBUF_SIZE (*((uint32_t volatile*)(0x38700048)))
|
| 557 | | -#define ATA_CADR_TBUF (*((void* volatile*)(0x3870004c)))
|
| 558 | | -#define ATA_CADR_SBUF (*((void* volatile*)(0x38700050)))
|
| 559 | | -#define ATA_PIO_DTR (*((uint32_t volatile*)(0x38700054)))
|
| 560 | | -#define ATA_PIO_FED (*((uint32_t volatile*)(0x38700058)))
|
| 561 | | -#define ATA_PIO_SCR (*((uint32_t volatile*)(0x3870005c)))
|
| 562 | | -#define ATA_PIO_LLR (*((uint32_t volatile*)(0x38700060)))
|
| 563 | | -#define ATA_PIO_LMR (*((uint32_t volatile*)(0x38700064)))
|
| 564 | | -#define ATA_PIO_LHR (*((uint32_t volatile*)(0x38700068)))
|
| 565 | | -#define ATA_PIO_DVR (*((uint32_t volatile*)(0x3870006c)))
|
| 566 | | -#define ATA_PIO_CSD (*((uint32_t volatile*)(0x38700070)))
|
| 567 | | -#define ATA_PIO_DAD (*((uint32_t volatile*)(0x38700074)))
|
| 568 | | -#define ATA_PIO_READY (*((uint32_t volatile*)(0x38700078)))
|
| 569 | | -#define ATA_PIO_RDATA (*((uint32_t volatile*)(0x3870007c)))
|
| 570 | | -#define ATA_BUS_FIFO_STATUS (*((uint32_t volatile*)(0x38700080)))
|
| 571 | | -#define ATA_FIFO_STATUS (*((uint32_t volatile*)(0x38700084)))
|
| 572 | | -#define ATA_DMA_ADDR (*((void* volatile*)(0x38700088)))
|
| 573 | | -
|
| 574 | | -
|
| 575 | | -/////CLICKWHEEL/////
|
| 576 | | -#define WHEEL00 (*((uint32_t volatile*)(0x3C200000)))
|
| 577 | | -#define WHEEL04 (*((uint32_t volatile*)(0x3C200004)))
|
| 578 | | -#define WHEEL08 (*((uint32_t volatile*)(0x3C200008)))
|
| 579 | | -#define WHEEL0C (*((uint32_t volatile*)(0x3C20000C)))
|
| 580 | | -#define WHEEL10 (*((uint32_t volatile*)(0x3C200010)))
|
| 581 | | -#define WHEELINT (*((uint32_t volatile*)(0x3C200014)))
|
| 582 | | -#define WHEELRX (*((uint32_t volatile*)(0x3C200018)))
|
| 583 | | -#define WHEELTX (*((uint32_t volatile*)(0x3C20001C)))
|
| 584 | | -
|
| 585 | | -
|
| 586 | | -/////CLOCK GATES/////
|
| 587 | | -#define CLOCKGATE_USB_1 2
|
| 588 | | -#define CLOCKGATE_USB_2 35
|
| 589 | | -
|
| 590 | | -
|
| 591 | | -/////INTERRUPTS/////
|
| 592 | | -#define IRQ_TIMER 8
|
| 593 | | -#define IRQ_USB_FUNC 19
|
| 594 | | -#define IRQ_DMAC(d) 16 + d
|
| 595 | | -#define IRQ_DMAC0 16
|
| 596 | | -#define IRQ_DMAC1 17
|
| 597 | | -#define IRQ_WHEEL 23
|
| 598 | | -#define IRQ_ATA 29
|
| 599 | | -
|
| 600 | | -
|
| 601 | | -#endif
|
| | 2 | +// |
| | 3 | +// |
| | 4 | +// Copyright 2010 TheSeven |
| | 5 | +// |
| | 6 | +// |
| | 7 | +// This file is part of emCORE. |
| | 8 | +// |
| | 9 | +// emCORE is free software: you can redistribute it and/or |
| | 10 | +// modify it under the terms of the GNU General Public License as |
| | 11 | +// published by the Free Software Foundation, either version 2 of the |
| | 12 | +// License, or (at your option) any later version. |
| | 13 | +// |
| | 14 | +// emCORE is distributed in the hope that it will be useful, |
| | 15 | +// but WITHOUT ANY WARRANTY; without even the implied warranty of |
| | 16 | +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
| | 17 | +// See the GNU General Public License for more details. |
| | 18 | +// |
| | 19 | +// You should have received a copy of the GNU General Public License along |
| | 20 | +// with emCORE. If not, see <http://www.gnu.org/licenses/>. |
| | 21 | +// |
| | 22 | +// |
| | 23 | + |
| | 24 | + |
| | 25 | +#ifndef __S5L8702_H__ |
| | 26 | +#define __S5L8702_H__ |
| | 27 | + |
| | 28 | +#include "global.h" |
| | 29 | + |
| | 30 | + |
| | 31 | +/////SYSCON///// |
| | 32 | +#define PWRCON(i) (*((uint32_t volatile*)(0x3C500000 \ |
| | 33 | + + ((i) == 4 ? 0x6C : \ |
| | 34 | + ((i) == 3 ? 0x68 : \ |
| | 35 | + ((i) == 2 ? 0x58 : \ |
| | 36 | + ((i) == 1 ? 0x4C : \ |
| | 37 | + 0x48))))))) |
| | 38 | + |
| | 39 | + |
| | 40 | +/////TIMER///// |
| | 41 | +#define TACON (*((uint32_t volatile*)(0x3C700000))) |
| | 42 | +#define TACMD (*((uint32_t volatile*)(0x3C700004))) |
| | 43 | +#define TADATA0 (*((uint32_t volatile*)(0x3C700008))) |
| | 44 | +#define TADATA1 (*((uint32_t volatile*)(0x3C70000C))) |
| | 45 | +#define TAPRE (*((uint32_t volatile*)(0x3C700010))) |
| | 46 | +#define TACNT (*((uint32_t volatile*)(0x3C700014))) |
| | 47 | +#define TBCON (*((uint32_t volatile*)(0x3C700020))) |
| | 48 | +#define TBCMD (*((uint32_t volatile*)(0x3C700024))) |
| | 49 | +#define TBDATA0 (*((uint32_t volatile*)(0x3C700028))) |
| | 50 | +#define TBDATA1 (*((uint32_t volatile*)(0x3C70002C))) |
| | 51 | +#define TBPRE (*((uint32_t volatile*)(0x3C700030))) |
| | 52 | +#define TBCNT (*((uint32_t volatile*)(0x3C700034))) |
| | 53 | +#define TCCON (*((uint32_t volatile*)(0x3C700040))) |
| | 54 | +#define TCCMD (*((uint32_t volatile*)(0x3C700044))) |
| | 55 | +#define TCDATA0 (*((uint32_t volatile*)(0x3C700048))) |
| | 56 | +#define TCDATA1 (*((uint32_t volatile*)(0x3C70004C))) |
| | 57 | +#define TCPRE (*((uint32_t volatile*)(0x3C700050))) |
| | 58 | +#define TCCNT (*((uint32_t volatile*)(0x3C700054))) |
| | 59 | +#define TDCON (*((uint32_t volatile*)(0x3C700060))) |
| | 60 | +#define TDCMD (*((uint32_t volatile*)(0x3C700064))) |
| | 61 | +#define TDDATA0 (*((uint32_t volatile*)(0x3C700068))) |
| | 62 | +#define TDDATA1 (*((uint32_t volatile*)(0x3C70006C))) |
| | 63 | +#define TDPRE (*((uint32_t volatile*)(0x3C700070))) |
| | 64 | +#define TDCNT (*((uint32_t volatile*)(0x3C700074))) |
| | 65 | +#define TECON (*((uint32_t volatile*)(0x3C7000A0))) |
| | 66 | +#define TECMD (*((uint32_t volatile*)(0x3C7000A4))) |
| | 67 | +#define TEDATA0 (*((uint32_t volatile*)(0x3C7000A8))) |
| | 68 | +#define TEDATA1 (*((uint32_t volatile*)(0x3C7000AC))) |
| | 69 | +#define TEPRE (*((uint32_t volatile*)(0x3C7000B0))) |
| | 70 | +#define TECNT (*((uint32_t volatile*)(0x3C7000B4))) |
| | 71 | +#define TFCON (*((uint32_t volatile*)(0x3C7000C0))) |
| | 72 | +#define TFCMD (*((uint32_t volatile*)(0x3C7000C4))) |
| | 73 | +#define TFDATA0 (*((uint32_t volatile*)(0x3C7000C8))) |
| | 74 | +#define TFDATA1 (*((uint32_t volatile*)(0x3C7000CC))) |
| | 75 | +#define TFPRE (*((uint32_t volatile*)(0x3C7000D0))) |
| | 76 | +#define TFCNT (*((uint32_t volatile*)(0x3C7000D4))) |
| | 77 | +#define TGCON (*((uint32_t volatile*)(0x3C7000E0))) |
| | 78 | +#define TGCMD (*((uint32_t volatile*)(0x3C7000E4))) |
| | 79 | +#define TGDATA0 (*((uint32_t volatile*)(0x3C7000E8))) |
| | 80 | +#define TGDATA1 (*((uint32_t volatile*)(0x3C7000EC))) |
| | 81 | +#define TGPRE (*((uint32_t volatile*)(0x3C7000F0))) |
| | 82 | +#define TGCNT (*((uint32_t volatile*)(0x3C7000F4))) |
| | 83 | +#define THCON (*((uint32_t volatile*)(0x3C700100))) |
| | 84 | +#define THCMD (*((uint32_t volatile*)(0x3C700104))) |
| | 85 | +#define THDATA0 (*((uint32_t volatile*)(0x3C700108))) |
| | 86 | +#define THDATA1 (*((uint32_t volatile*)(0x3C70010C))) |
| | 87 | +#define THPRE (*((uint32_t volatile*)(0x3C700110))) |
| | 88 | +#define THCNT (*((uint32_t volatile*)(0x3C700114))) |
| | 89 | + |
| | 90 | + |
| | 91 | +/////USB///// |
| | 92 | +#define OTGBASE 0x38400000 |
| | 93 | +#define PHYBASE 0x3C400000 |
| | 94 | +#define SYNOPSYSOTG_CLOCK 0 |
| | 95 | +#define SYNOPSYSOTG_AHBCFG 0x2B |
| | 96 | + |
| | 97 | + |
| | 98 | +/////I2C///// |
| | 99 | +#define IICCON(bus) (*((uint32_t volatile*)(0x3C600000 + 0x300000 * (bus)))) |
| | 100 | +#define IICSTAT(bus) (*((uint32_t volatile*)(0x3C600004 + 0x300000 * (bus)))) |
| | 101 | +#define IICADD(bus) (*((uint32_t volatile*)(0x3C600008 + 0x300000 * (bus)))) |
| | 102 | +#define IICDS(bus) (*((uint32_t volatile*)(0x3C60000C + 0x300000 * (bus)))) |
| | 103 | +#define IIC10(bus) (*((uint32_t volatile*)(0x3C600010 + 0x300000 * (bus)))) |
| | 104 | + |
| | 105 | + |
| | 106 | +/////INTERRUPT CONTROLLERS///// |
| | 107 | +#define VICIRQSTATUS(v) (*((uint32_t volatile*)(0x38E00000 + 0x1000 * (v)))) |
| | 108 | +#define VICFIQSTATUS(v) (*((uint32_t volatile*)(0x38E00004 + 0x1000 * (v)))) |
| | 109 | +#define VICRAWINTR(v) (*((uint32_t volatile*)(0x38E00008 + 0x1000 * (v)))) |
| | 110 | +#define VICINTSELECT(v) (*((uint32_t volatile*)(0x38E0000C + 0x1000 * (v)))) |
| | 111 | +#define VICINTENABLE(v) (*((uint32_t volatile*)(0x38E00010 + 0x1000 * (v)))) |
| | 112 | +#define VICINTENCLEAR(v) (*((uint32_t volatile*)(0x38E00014 + 0x1000 * (v)))) |
| | 113 | +#define VICSOFTINT(v) (*((uint32_t volatile*)(0x38E00018 + 0x1000 * (v)))) |
| | 114 | +#define VICSOFTINTCLEAR(v) (*((uint32_t volatile*)(0x38E0001C + 0x1000 * (v)))) |
| | 115 | +#define VICPROTECTION(v) (*((uint32_t volatile*)(0x38E00020 + 0x1000 * (v)))) |
| | 116 | +#define VICSWPRIORITYMASK(v) (*((uint32_t volatile*)(0x38E00024 + 0x1000 * (v)))) |
| | 117 | +#define VICPRIORITYDAISY(v) (*((uint32_t volatile*)(0x38E00028 + 0x1000 * (v)))) |
| | 118 | +#define VICVECTADDR(v, i) (*((uint32_t volatile*)(0x38E00100 + 0x1000 * (v) + 4 * (i)))) |
| | 119 | +#define VICVECTPRIORITY(v, i) (*((uint32_t volatile*)(0x38E00200 + 0x1000 * (v) + 4 * (i)))) |
| | 120 | +#define VICADDRESS(v) (*((const void* volatile*)(0x38E00F00 + 0x1000 * (v)))) |
| | 121 | +#define VIC0IRQSTATUS (*((uint32_t volatile*)(0x38E00000))) |
| | 122 | +#define VIC0FIQSTATUS (*((uint32_t volatile*)(0x38E00004))) |
| | 123 | +#define VIC0RAWINTR (*((uint32_t volatile*)(0x38E00008))) |
| | 124 | +#define VIC0INTSELECT (*((uint32_t volatile*)(0x38E0000C))) |
| | 125 | +#define VIC0INTENABLE (*((uint32_t volatile*)(0x38E00010))) |
| | 126 | +#define VIC0INTENCLEAR (*((uint32_t volatile*)(0x38E00014))) |
| | 127 | +#define VIC0SOFTINT (*((uint32_t volatile*)(0x38E00018))) |
| | 128 | +#define VIC0SOFTINTCLEAR (*((uint32_t volatile*)(0x38E0001C))) |
| | 129 | +#define VIC0PROTECTION (*((uint32_t volatile*)(0x38E00020))) |
| | 130 | +#define VIC0SWPRIORITYMASK (*((uint32_t volatile*)(0x38E00024))) |
| | 131 | +#define VIC0PRIORITYDAISY (*((uint32_t volatile*)(0x38E00028))) |
| | 132 | +#define VIC0VECTADDR(i) (*((const void* volatile*)(0x38E00100 + 4 * (i)))) |
| | 133 | +#define VIC0VECTADDR0 (*((const void* volatile*)(0x38E00100))) |
| | 134 | +#define VIC0VECTADDR1 (*((const void* volatile*)(0x38E00104))) |
| | 135 | +#define VIC0VECTADDR2 (*((const void* volatile*)(0x38E00108))) |
| | 136 | +#define VIC0VECTADDR3 (*((const void* volatile*)(0x38E0010C))) |
| | 137 | +#define VIC0VECTADDR4 (*((const void* volatile*)(0x38E00110))) |
| | 138 | +#define VIC0VECTADDR5 (*((const void* volatile*)(0x38E00114))) |
| | 139 | +#define VIC0VECTADDR6 (*((const void* volatile*)(0x38E00118))) |
| | 140 | +#define VIC0VECTADDR7 (*((const void* volatile*)(0x38E0011C))) |
| | 141 | +#define VIC0VECTADDR8 (*((const void* volatile*)(0x38E00120))) |
| | 142 | +#define VIC0VECTADDR9 (*((const void* volatile*)(0x38E00124))) |
| | 143 | +#define VIC0VECTADDR10 (*((const void* volatile*)(0x38E00128))) |
| | 144 | +#define VIC0VECTADDR11 (*((const void* volatile*)(0x38E0012C))) |
| | 145 | +#define VIC0VECTADDR12 (*((const void* volatile*)(0x38E00130))) |
| | 146 | +#define VIC0VECTADDR13 (*((const void* volatile*)(0x38E00134))) |
| | 147 | +#define VIC0VECTADDR14 (*((const void* volatile*)(0x38E00138))) |
| | 148 | +#define VIC0VECTADDR15 (*((const void* volatile*)(0x38E0013C))) |
| | 149 | +#define VIC0VECTADDR16 (*((const void* volatile*)(0x38E00140))) |
| | 150 | +#define VIC0VECTADDR17 (*((const void* volatile*)(0x38E00144))) |
| | 151 | +#define VIC0VECTADDR18 (*((const void* volatile*)(0x38E00148))) |
| | 152 | +#define VIC0VECTADDR19 (*((const void* volatile*)(0x38E0014C))) |
| | 153 | +#define VIC0VECTADDR20 (*((const void* volatile*)(0x38E00150))) |
| | 154 | +#define VIC0VECTADDR21 (*((const void* volatile*)(0x38E00154))) |
| | 155 | +#define VIC0VECTADDR22 (*((const void* volatile*)(0x38E00158))) |
| | 156 | +#define VIC0VECTADDR23 (*((const void* volatile*)(0x38E0015C))) |
| | 157 | +#define VIC0VECTADDR24 (*((const void* volatile*)(0x38E00160))) |
| | 158 | +#define VIC0VECTADDR25 (*((const void* volatile*)(0x38E00164))) |
| | 159 | +#define VIC0VECTADDR26 (*((const void* volatile*)(0x38E00168))) |
| | 160 | +#define VIC0VECTADDR27 (*((const void* volatile*)(0x38E0016C))) |
| | 161 | +#define VIC0VECTADDR28 (*((const void* volatile*)(0x38E00170))) |
| | 162 | +#define VIC0VECTADDR29 (*((const void* volatile*)(0x38E00174))) |
| | 163 | +#define VIC0VECTADDR30 (*((const void* volatile*)(0x38E00178))) |
| | 164 | +#define VIC0VECTADDR31 (*((const void* volatile*)(0x38E0017C))) |
| | 165 | +#define VIC0VECTPRIORITY(i) (*((uint32_t volatile*)(0x38E00200 + 4 * (i)))) |
| | 166 | +#define VIC0VECTPRIORITY0 (*((uint32_t volatile*)(0x38E00200))) |
| | 167 | +#define VIC0VECTPRIORITY1 (*((uint32_t volatile*)(0x38E00204))) |
| | 168 | +#define VIC0VECTPRIORITY2 (*((uint32_t volatile*)(0x38E00208))) |
| | 169 | +#define VIC0VECTPRIORITY3 (*((uint32_t volatile*)(0x38E0020C))) |
| | 170 | +#define VIC0VECTPRIORITY4 (*((uint32_t volatile*)(0x38E00210))) |
| | 171 | +#define VIC0VECTPRIORITY5 (*((uint32_t volatile*)(0x38E00214))) |
| | 172 | +#define VIC0VECTPRIORITY6 (*((uint32_t volatile*)(0x38E00218))) |
| | 173 | +#define VIC0VECTPRIORITY7 (*((uint32_t volatile*)(0x38E0021C))) |
| | 174 | +#define VIC0VECTPRIORITY8 (*((uint32_t volatile*)(0x38E00220))) |
| | 175 | +#define VIC0VECTPRIORITY9 (*((uint32_t volatile*)(0x38E00224))) |
| | 176 | +#define VIC0VECTPRIORITY10 (*((uint32_t volatile*)(0x38E00228))) |
| | 177 | +#define VIC0VECTPRIORITY11 (*((uint32_t volatile*)(0x38E0022C))) |
| | 178 | +#define VIC0VECTPRIORITY12 (*((uint32_t volatile*)(0x38E00230))) |
| | 179 | +#define VIC0VECTPRIORITY13 (*((uint32_t volatile*)(0x38E00234))) |
| | 180 | +#define VIC0VECTPRIORITY14 (*((uint32_t volatile*)(0x38E00238))) |
| | 181 | +#define VIC0VECTPRIORITY15 (*((uint32_t volatile*)(0x38E0023C))) |
| | 182 | +#define VIC0VECTPRIORITY16 (*((uint32_t volatile*)(0x38E00240))) |
| | 183 | +#define VIC0VECTPRIORITY17 (*((uint32_t volatile*)(0x38E00244))) |
| | 184 | +#define VIC0VECTPRIORITY18 (*((uint32_t volatile*)(0x38E00248))) |
| | 185 | +#define VIC0VECTPRIORITY19 (*((uint32_t volatile*)(0x38E0024C))) |
| | 186 | +#define VIC0VECTPRIORITY20 (*((uint32_t volatile*)(0x38E00250))) |
| | 187 | +#define VIC0VECTPRIORITY21 (*((uint32_t volatile*)(0x38E00254))) |
| | 188 | +#define VIC0VECTPRIORITY22 (*((uint32_t volatile*)(0x38E00258))) |
| | 189 | +#define VIC0VECTPRIORITY23 (*((uint32_t volatile*)(0x38E0025C))) |
| | 190 | +#define VIC0VECTPRIORITY24 (*((uint32_t volatile*)(0x38E00260))) |
| | 191 | +#define VIC0VECTPRIORITY25 (*((uint32_t volatile*)(0x38E00264))) |
| | 192 | +#define VIC0VECTPRIORITY26 (*((uint32_t volatile*)(0x38E00268))) |
| | 193 | +#define VIC0VECTPRIORITY27 (*((uint32_t volatile*)(0x38E0026C))) |
| | 194 | +#define VIC0VECTPRIORITY28 (*((uint32_t volatile*)(0x38E00270))) |
| | 195 | +#define VIC0VECTPRIORITY29 (*((uint32_t volatile*)(0x38E00274))) |
| | 196 | +#define VIC0VECTPRIORITY30 (*((uint32_t volatile*)(0x38E00278))) |
| | 197 | +#define VIC0VECTPRIORITY31 (*((uint32_t volatile*)(0x38E0027C))) |
| | 198 | +#define VIC0ADDRESS (*((void* volatile*)(0x38E00F00))) |
| | 199 | +#define VIC1IRQSTATUS (*((uint32_t volatile*)(0x38E01000))) |
| | 200 | +#define VIC1FIQSTATUS (*((uint32_t volatile*)(0x38E01004))) |
| | 201 | +#define VIC1RAWINTR (*((uint32_t volatile*)(0x38E01008))) |
| | 202 | +#define VIC1INTSELECT (*((uint32_t volatile*)(0x38E0100C))) |
| | 203 | +#define VIC1INTENABLE (*((uint32_t volatile*)(0x38E01010))) |
| | 204 | +#define VIC1INTENCLEAR (*((uint32_t volatile*)(0x38E01014))) |
| | 205 | +#define VIC1SOFTINT (*((uint32_t volatile*)(0x38E01018))) |
| | 206 | +#define VIC1SOFTINTCLEAR (*((uint32_t volatile*)(0x38E0101C))) |
| | 207 | +#define VIC1PROTECTION (*((uint32_t volatile*)(0x38E01020))) |
| | 208 | +#define VIC1SWPRIORITYMASK (*((uint32_t volatile*)(0x38E01024))) |
| | 209 | +#define VIC1PRIORITYDAISY (*((uint32_t volatile*)(0x38E01028))) |
| | 210 | +#define VIC1VECTADDR(i) (*((const void* volatile*)(0x38E01100 + 4 * (i)))) |
| | 211 | +#define VIC1VECTADDR0 (*((const void* volatile*)(0x38E01100))) |
| | 212 | +#define VIC1VECTADDR1 (*((const void* volatile*)(0x38E01104))) |
| | 213 | +#define VIC1VECTADDR2 (*((const void* volatile*)(0x38E01108))) |
| | 214 | +#define VIC1VECTADDR3 (*((const void* volatile*)(0x38E0110C))) |
| | 215 | +#define VIC1VECTADDR4 (*((const void* volatile*)(0x38E01110))) |
| | 216 | +#define VIC1VECTADDR5 (*((const void* volatile*)(0x38E01114))) |
| | 217 | +#define VIC1VECTADDR6 (*((const void* volatile*)(0x38E01118))) |
| | 218 | +#define VIC1VECTADDR7 (*((const void* volatile*)(0x38E0111C))) |
| | 219 | +#define VIC1VECTADDR8 (*((const void* volatile*)(0x38E01120))) |
| | 220 | +#define VIC1VECTADDR9 (*((const void* volatile*)(0x38E01124))) |
| | 221 | +#define VIC1VECTADDR10 (*((const void* volatile*)(0x38E01128))) |
| | 222 | +#define VIC1VECTADDR11 (*((const void* volatile*)(0x38E0112C))) |
| | 223 | +#define VIC1VECTADDR12 (*((const void* volatile*)(0x38E01130))) |
| | 224 | +#define VIC1VECTADDR13 (*((const void* volatile*)(0x38E01134))) |
| | 225 | +#define VIC1VECTADDR14 (*((const void* volatile*)(0x38E01138))) |
| | 226 | +#define VIC1VECTADDR15 (*((const void* volatile*)(0x38E0113C))) |
| | 227 | +#define VIC1VECTADDR16 (*((const void* volatile*)(0x38E01140))) |
| | 228 | +#define VIC1VECTADDR17 (*((const void* volatile*)(0x38E01144))) |
| | 229 | +#define VIC1VECTADDR18 (*((const void* volatile*)(0x38E01148))) |
| | 230 | +#define VIC1VECTADDR19 (*((const void* volatile*)(0x38E0114C))) |
| | 231 | +#define VIC1VECTADDR20 (*((const void* volatile*)(0x38E01150))) |
| | 232 | +#define VIC1VECTADDR21 (*((const void* volatile*)(0x38E01154))) |
| | 233 | +#define VIC1VECTADDR22 (*((const void* volatile*)(0x38E01158))) |
| | 234 | +#define VIC1VECTADDR23 (*((const void* volatile*)(0x38E0115C))) |
| | 235 | +#define VIC1VECTADDR24 (*((const void* volatile*)(0x38E01160))) |
| | 236 | +#define VIC1VECTADDR25 (*((const void* volatile*)(0x38E01164))) |
| | 237 | +#define VIC1VECTADDR26 (*((const void* volatile*)(0x38E01168))) |
| | 238 | +#define VIC1VECTADDR27 (*((const void* volatile*)(0x38E0116C))) |
| | 239 | +#define VIC1VECTADDR28 (*((const void* volatile*)(0x38E01170))) |
| | 240 | +#define VIC1VECTADDR29 (*((const void* volatile*)(0x38E01174))) |
| | 241 | +#define VIC1VECTADDR30 (*((const void* volatile*)(0x38E01178))) |
| | 242 | +#define VIC1VECTADDR31 (*((const void* volatile*)(0x38E0117C))) |
| | 243 | +#define VIC1VECTPRIORITY(i) (*((uint32_t volatile*)(0x38E01200 + 4 * (i)))) |
| | 244 | +#define VIC1VECTPRIORITY0 (*((uint32_t volatile*)(0x38E01200))) |
| | 245 | +#define VIC1VECTPRIORITY1 (*((uint32_t volatile*)(0x38E01204))) |
| | 246 | +#define VIC1VECTPRIORITY2 (*((uint32_t volatile*)(0x38E01208))) |
| | 247 | +#define VIC1VECTPRIORITY3 (*((uint32_t volatile*)(0x38E0120C))) |
| | 248 | +#define VIC1VECTPRIORITY4 (*((uint32_t volatile*)(0x38E01210))) |
| | 249 | +#define VIC1VECTPRIORITY5 (*((uint32_t volatile*)(0x38E01214))) |
| | 250 | +#define VIC1VECTPRIORITY6 (*((uint32_t volatile*)(0x38E01218))) |
| | 251 | +#define VIC1VECTPRIORITY7 (*((uint32_t volatile*)(0x38E0121C))) |
| | 252 | +#define VIC1VECTPRIORITY8 (*((uint32_t volatile*)(0x38E01220))) |
| | 253 | +#define VIC1VECTPRIORITY9 (*((uint32_t volatile*)(0x38E01224))) |
| | 254 | +#define VIC1VECTPRIORITY10 (*((uint32_t volatile*)(0x38E01228))) |
| | 255 | +#define VIC1VECTPRIORITY11 (*((uint32_t volatile*)(0x38E0122C))) |
| | 256 | +#define VIC1VECTPRIORITY12 (*((uint32_t volatile*)(0x38E01230))) |
| | 257 | +#define VIC1VECTPRIORITY13 (*((uint32_t volatile*)(0x38E01234))) |
| | 258 | +#define VIC1VECTPRIORITY14 (*((uint32_t volatile*)(0x38E01238))) |
| | 259 | +#define VIC1VECTPRIORITY15 (*((uint32_t volatile*)(0x38E0123C))) |
| | 260 | +#define VIC1VECTPRIORITY16 (*((uint32_t volatile*)(0x38E01240))) |
| | 261 | +#define VIC1VECTPRIORITY17 (*((uint32_t volatile*)(0x38E01244))) |
| | 262 | +#define VIC1VECTPRIORITY18 (*((uint32_t volatile*)(0x38E01248))) |
| | 263 | +#define VIC1VECTPRIORITY19 (*((uint32_t volatile*)(0x38E0124C))) |
| | 264 | +#define VIC1VECTPRIORITY20 (*((uint32_t volatile*)(0x38E01250))) |
| | 265 | +#define VIC1VECTPRIORITY21 (*((uint32_t volatile*)(0x38E01254))) |
| | 266 | +#define VIC1VECTPRIORITY22 (*((uint32_t volatile*)(0x38E01258))) |
| | 267 | +#define VIC1VECTPRIORITY23 (*((uint32_t volatile*)(0x38E0125C))) |
| | 268 | +#define VIC1VECTPRIORITY24 (*((uint32_t volatile*)(0x38E01260))) |
| | 269 | +#define VIC1VECTPRIORITY25 (*((uint32_t volatile*)(0x38E01264))) |
| | 270 | +#define VIC1VECTPRIORITY26 (*((uint32_t volatile*)(0x38E01268))) |
| | 271 | +#define VIC1VECTPRIORITY27 (*((uint32_t volatile*)(0x38E0126C))) |
| | 272 | +#define VIC1VECTPRIORITY28 (*((uint32_t volatile*)(0x38E01270))) |
| | 273 | +#define VIC1VECTPRIORITY29 (*((uint32_t volatile*)(0x38E01274))) |
| | 274 | +#define VIC1VECTPRIORITY30 (*((uint32_t volatile*)(0x38E01278))) |
| | 275 | +#define VIC1VECTPRIORITY31 (*((uint32_t volatile*)(0x38E0127C))) |
| | 276 | +#define VIC1ADDRESS (*((void* volatile*)(0x38E01F00))) |
| | 277 | + |
| | 278 | + |
| | 279 | +/////GPIO///// |
| | 280 | +#define PCON(i) (*((uint32_t volatile*)(0x3cf00000 + ((i) << 5)))) |
| | 281 | +#define PDAT(i) (*((uint32_t volatile*)(0x3cf00004 + ((i) << 5)))) |
| | 282 | +#define PUNA(i) (*((uint32_t volatile*)(0x3cf00008 + ((i) << 5)))) |
| | 283 | +#define PUNB(i) (*((uint32_t volatile*)(0x3cf0000c + ((i) << 5)))) |
| | 284 | +#define PCON0 (*((uint32_t volatile*)(0x3cf00000))) |
| | 285 | +#define PDAT0 (*((uint32_t volatile*)(0x3cf00004))) |
| | 286 | +#define PCON1 (*((uint32_t volatile*)(0x3cf00020))) |
| | 287 | +#define PDAT1 (*((uint32_t volatile*)(0x3cf00024))) |
| | 288 | +#define PCON2 (*((uint32_t volatile*)(0x3cf00040))) |
| | 289 | +#define PDAT2 (*((uint32_t volatile*)(0x3cf00044))) |
| | 290 | +#define PCON3 (*((uint32_t volatile*)(0x3cf00060))) |
| | 291 | +#define PDAT3 (*((uint32_t volatile*)(0x3cf00064))) |
| | 292 | +#define PCON4 (*((uint32_t volatile*)(0x3cf00080))) |
| | 293 | +#define PDAT4 (*((uint32_t volatile*)(0x3cf00084))) |
| | 294 | +#define PCON5 (*((uint32_t volatile*)(0x3cf000a0))) |
| | 295 | +#define PDAT5 (*((uint32_t volatile*)(0x3cf000a4))) |
| | 296 | +#define PCON6 (*((uint32_t volatile*)(0x3cf000c0))) |
| | 297 | +#define PDAT6 (*((uint32_t volatile*)(0x3cf000c4))) |
| | 298 | +#define PCON7 (*((uint32_t volatile*)(0x3cf000e0))) |
| | 299 | +#define PDAT7 (*((uint32_t volatile*)(0x3cf000e4))) |
| | 300 | +#define PCON8 (*((uint32_t volatile*)(0x3cf00100))) |
| | 301 | +#define PDAT8 (*((uint32_t volatile*)(0x3cf00104))) |
| | 302 | +#define PCON9 (*((uint32_t volatile*)(0x3cf00120))) |
| | 303 | +#define PDAT9 (*((uint32_t volatile*)(0x3cf00124))) |
| | 304 | +#define PCONA (*((uint32_t volatile*)(0x3cf00140))) |
| | 305 | +#define PDATA (*((uint32_t volatile*)(0x3cf00144))) |
| | 306 | +#define PCONB (*((uint32_t volatile*)(0x3cf00160))) |
| | 307 | +#define PDATB (*((uint32_t volatile*)(0x3cf00164))) |
| | 308 | +#define PCONC (*((uint32_t volatile*)(0x3cf00180))) |
| | 309 | +#define PDATC (*((uint32_t volatile*)(0x3cf00184))) |
| | 310 | +#define PCOND (*((uint32_t volatile*)(0x3cf001a0))) |
| | 311 | +#define PDATD (*((uint32_t volatile*)(0x3cf001a4))) |
| | 312 | +#define PCONE (*((uint32_t volatile*)(0x3cf001c0))) |
| | 313 | +#define PDATE (*((uint32_t volatile*)(0x3cf001c4))) |
| | 314 | +#define PCONF (*((uint32_t volatile*)(0x3cf001e0))) |
| | 315 | +#define PDATF (*((uint32_t volatile*)(0x3cf001e4))) |
| | 316 | +#define GPIOCMD (*((uint32_t volatile*)(0x3cf00200))) |
| | 317 | + |
| | 318 | + |
| | 319 | +/////SPI///// |
| | 320 | +#define SPIBASE(i) ((i) == 2 ? 0x3d200000 : \ |
| | 321 | + (i) == 1 ? 0x3ce00000 : \ |
| | 322 | + 0x3c300000) |
| | 323 | +#define SPICLKGATE(i) ((i) == 2 ? 0x2f : \ |
| | 324 | + (i) == 1 ? 0x2b : \ |
| | 325 | + 0x22) |
| | 326 | +#define SPIDMA(i) ((i) == 2 ? 0xd : \ |
| | 327 | + (i) == 1 ? 0xf : \ |
| | 328 | + 0x5) |
| | 329 | +#define SPICTRL(i) (*((uint32_t volatile*)(SPIBASE(i)))) |
| | 330 | +#define SPISETUP(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x4))) |
| | 331 | +#define SPISTATUS(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x8))) |
| | 332 | +#define SPIUNKREG1(i) (*((uint32_t volatile*)(SPIBASE(i) + 0xc))) |
| | 333 | +#define SPITXDATA(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x10))) |
| | 334 | +#define SPIRXDATA(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x20))) |
| | 335 | +#define SPICLKDIV(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x30))) |
| | 336 | +#define SPIRXLIMIT(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x34))) |
| | 337 | +#define SPIUNKREG3(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x38))) |
| | 338 | + |
| | 339 | + |
| | 340 | +/////AES///// |
| | 341 | +#define AESCONTROL (*((uint32_t volatile*)(0x38c00000))) |
| | 342 | +#define AESGO (*((uint32_t volatile*)(0x38c00004))) |
| | 343 | +#define AESUNKREG0 (*((uint32_t volatile*)(0x38c00008))) |
| | 344 | +#define AESSTATUS (*((uint32_t volatile*)(0x38c0000c))) |
| | 345 | +#define AESUNKREG1 (*((uint32_t volatile*)(0x38c00010))) |
| | 346 | +#define AESKEYLEN (*((uint32_t volatile*)(0x38c00014))) |
| | 347 | +#define AESOUTSIZE (*((uint32_t volatile*)(0x38c00018))) |
| | 348 | +#define AESOUTADDR (*((void* volatile*)(0x38c00020))) |
| | 349 | +#define AESINSIZE (*((uint32_t volatile*)(0x38c00024))) |
| | 350 | +#define AESINADDR (*((const void* volatile*)(0x38c00028))) |
| | 351 | +#define AESAUXSIZE (*((uint32_t volatile*)(0x38c0002c))) |
| | 352 | +#define AESAUXADDR (*((void* volatile*)(0x38c00030))) |
| | 353 | +#define AESSIZE3 (*((uint32_t volatile*)(0x38c00034))) |
| | 354 | +#define AESKEY ((uint32_t volatile*)(0x38c0004c)) |
| | 355 | +#define AESTYPE (*((uint32_t volatile*)(0x38c0006c))) |
| | 356 | +#define AESIV ((uint32_t volatile*)(0x38c00074)) |
| | 357 | +#define AESTYPE2 (*((uint32_t volatile*)(0x38c00088))) |
| | 358 | +#define AESUNKREG2 (*((uint32_t volatile*)(0x38c0008c))) |
| | 359 | + |
| | 360 | + |
| | 361 | +/////SHA1///// |
| | 362 | +#define SHA1CONFIG (*((uint32_t volatile*)(0x38000000))) |
| | 363 | +#define SHA1RESET (*((uint32_t volatile*)(0x38000004))) |
| | 364 | +#define SHA1RESULT ((uint32_t volatile*)(0x38000020)) |
| | 365 | +#define SHA1DATAIN ((uint32_t volatile*)(0x38000040)) |
| | 366 | + |
| | 367 | + |
| | 368 | +/////DMA///// |
| | 369 | +struct dma_lli |
| | 370 | +{ |
| | 371 | + void* srcaddr; |
| | 372 | + void* dstaddr; |
| | 373 | + const struct dma_lli* nextlli; |
| | 374 | + uint32_t control; |
| | 375 | +}; |
| | 376 | +#define DMACINTSTS(d) (*((uint32_t volatile*)(0x38200000 + 0x1700000 * (d)))) |
| | 377 | +#define DMACINTTCSTS(d) (*((uint32_t volatile*)(0x38200004 + 0x1700000 * (d)))) |
| | 378 | +#define DMACINTTCCLR(d) (*((uint32_t volatile*)(0x38200008 + 0x1700000 * (d)))) |
| | 379 | +#define DMACINTERRSTS(d) (*((uint32_t volatile*)(0x3820000c + 0x1700000 * (d)))) |
| | 380 | +#define DMACINTERRCLR(d) (*((uint32_t volatile*)(0x38200010 + 0x1700000 * (d)))) |
| | 381 | +#define DMACRAWINTTCSTS(d) (*((uint32_t volatile*)(0x38200014 + 0x1700000 * (d)))) |
| | 382 | +#define DMACRAWINTERRSTS(d) (*((uint32_t volatile*)(0x38200018 + 0x1700000 * (d)))) |
| | 383 | +#define DMACENABLEDCHANS(d) (*((uint32_t volatile*)(0x3820001c + 0x1700000 * (d)))) |
| | 384 | +#define DMACSOFTBREQ(d) (*((uint32_t volatile*)(0x38200020 + 0x1700000 * (d)))) |
| | 385 | +#define DMACSOFTSREQ(d) (*((uint32_t volatile*)(0x38200024 + 0x1700000 * (d)))) |
| | 386 | +#define DMACSOFTLBREQ(d) (*((uint32_t volatile*)(0x38200028 + 0x1700000 * (d)))) |
| | 387 | +#define DMACSOFTLSREQ(d) (*((uint32_t volatile*)(0x3820002c + 0x1700000 * (d)))) |
| | 388 | +#define DMACCONFIG(d) (*((uint32_t volatile*)(0x38200030 + 0x1700000 * (d)))) |
| | 389 | +#define DMACSYNC(d) (*((uint32_t volatile*)(0x38200034 + 0x1700000 * (d)))) |
| | 390 | +#define DMACCLLI(d, c) (*((struct dma_lli volatile*)(0x38200100 + 0x1700000 * (d) + 0x20 * (c)))) |
| | 391 | +#define DMACCSRCADDR(d, c) (*((const void* volatile*)(0x38200100 + 0x1700000 * (d) + 0x20 * (c)))) |
| | 392 | +#define DMACCDESTADDR(d, c) (*((void* volatile*)(0x38200104 + 0x1700000 * (d) + 0x20 * (c)))) |
| | 393 | +#define DMACCNEXTLLI(d, c) (*((const void* volatile*)(0x38200108 + 0x1700000 * (d) + 0x20 * (c)))) |
| | 394 | +#define DMACCCONTROL(d, c) (*((uint32_t volatile*)(0x3820010c + 0x1700000 * (d) + 0x20 * (c)))) |
| | 395 | +#define DMACCCONFIG(d, c) (*((uint32_t volatile*)(0x38200110 + 0x1700000 * (d) + 0x20 * (c)))) |
| | 396 | +#define DMAC0INTSTS (*((uint32_t volatile*)(0x38200000))) |
| | 397 | +#define DMAC0INTTCSTS (*((uint32_t volatile*)(0x38200004))) |
| | 398 | +#define DMAC0INTTCCLR (*((uint32_t volatile*)(0x38200008))) |
| | 399 | +#define DMAC0INTERRSTS (*((uint32_t volatile*)(0x3820000c))) |
| | 400 | +#define DMAC0INTERRCLR (*((uint32_t volatile*)(0x38200010))) |
| | 401 | +#define DMAC0RAWINTTCSTS (*((uint32_t volatile*)(0x38200014))) |
| | 402 | +#define DMAC0RAWINTERRSTS (*((uint32_t volatile*)(0x38200018))) |
| | 403 | +#define DMAC0ENABLEDCHANS (*((uint32_t volatile*)(0x3820001c))) |
| | 404 | +#define DMAC0SOFTBREQ (*((uint32_t volatile*)(0x38200020))) |
| | 405 | +#define DMAC0SOFTSREQ (*((uint32_t volatile*)(0x38200024))) |
| | 406 | +#define DMAC0SOFTLBREQ (*((uint32_t volatile*)(0x38200028))) |
| | 407 | +#define DMAC0SOFTLSREQ (*((uint32_t volatile*)(0x3820002c))) |
| | 408 | +#define DMAC0CONFIG (*((uint32_t volatile*)(0x38200030))) |
| | 409 | +#define DMAC0SYNC (*((uint32_t volatile*)(0x38200034))) |
| | 410 | +#define DMAC0CLLI(c) (*((struct dma_lli volatile*)(0x38200100 + 0x20 * (c)))) |
| | 411 | +#define DMAC0CSRCADDR(c) (*((const void* volatile*)(0x38200100 + 0x20 * (c)))) |
| | 412 | +#define DMAC0CDESTADDR(c) (*((void* volatile*)(0x38200104 + 0x20 * (c)))) |
| | 413 | +#define DMAC0CNEXTLLI(c) (*((const void* volatile*)(0x38200108 + 0x20 * (c)))) |
| | 414 | +#define DMAC0CCONTROL(c) (*((uint32_t volatile*)(0x3820010c + 0x20 * (c)))) |
| | 415 | +#define DMAC0CCONFIG(c) (*((uint32_t volatile*)(0x38200110 + 0x20 * (c)))) |
| | 416 | +#define DMAC0C0LLI (*((struct dma_lli volatile*)(0x38200100))) |
| | 417 | +#define DMAC0C0SRCADDR (*((const void* volatile*)(0x38200100))) |
| | 418 | +#define DMAC0C0DESTADDR (*((void* volatile*)(0x38200104))) |
| | 419 | +#define DMAC0C0NEXTLLI (*((const struct dma_lli* volatile*)(0x38200108))) |
| | 420 | +#define DMAC0C0CONTROL (*((uint32_t volatile*)(0x3820010c))) |
| | 421 | +#define DMAC0C0CONFIG (*((uint32_t volatile*)(0x38200110))) |
| | 422 | +#define DMAC0C1LLI (*((struct dma_lli volatile*)(0x38200120))) |
| | 423 | +#define DMAC0C1SRCADDR (*((const void* volatile*)(0x38200120))) |
| | 424 | +#define DMAC0C1DESTADDR (*((void* volatile*)(0x38200124))) |
| | 425 | +#define DMAC0C1NEXTLLI (*((const struct dma_lli* volatile*)(0x38200128))) |
| | 426 | +#define DMAC0C1CONTROL (*((uint32_t volatile*)(0x3820012c))) |
| | 427 | +#define DMAC0C1CONFIG (*((uint32_t volatile*)(0x38200130))) |
| | 428 | +#define DMAC0C2LLI (*((struct dma_lli volatile*)(0x38200140))) |
| | 429 | +#define DMAC0C2SRCADDR (*((const void* volatile*)(0x38200140))) |
| | 430 | +#define DMAC0C2DESTADDR (*((void* volatile*)(0x38200144))) |
| | 431 | +#define DMAC0C2NEXTLLI (*((const struct dma_lli* volatile*)(0x38200148))) |
| | 432 | +#define DMAC0C2CONTROL (*((uint32_t volatile*)(0x3820014c))) |
| | 433 | +#define DMAC0C2CONFIG (*((uint32_t volatile*)(0x38200150))) |
| | 434 | +#define DMAC0C3LLI (*((struct dma_lli volatile*)(0x38200160))) |
| | 435 | +#define DMAC0C3SRCADDR (*((const void* volatile*)(0x38200160))) |
| | 436 | +#define DMAC0C3DESTADDR (*((void* volatile*)(0x38200164))) |
| | 437 | +#define DMAC0C3NEXTLLI (*((const struct dma_lli* volatile*)(0x38200168))) |
| | 438 | +#define DMAC0C3CONTROL (*((uint32_t volatile*)(0x3820016c))) |
| | 439 | +#define DMAC0C3CONFIG (*((uint32_t volatile*)(0x38200170))) |
| | 440 | +#define DMAC0C4LLI (*((struct dma_lli volatile*)(0x38200180))) |
| | 441 | +#define DMAC0C4SRCADDR (*((const void* volatile*)(0x38200180))) |
| | 442 | +#define DMAC0C4DESTADDR (*((void* volatile*)(0x38200184))) |
| | 443 | +#define DMAC0C4NEXTLLI (*((const struct dma_lli* volatile*)(0x38200188))) |
| | 444 | +#define DMAC0C4CONTROL (*((uint32_t volatile*)(0x3820018c))) |
| | 445 | +#define DMAC0C4CONFIG (*((uint32_t volatile*)(0x38200190))) |
| | 446 | +#define DMAC0C5LLI (*((struct dma_lli volatile*)(0x382001a0))) |
| | 447 | +#define DMAC0C5SRCADDR (*((const void* volatile*)(0x382001a0))) |
| | 448 | +#define DMAC0C5DESTADDR (*((void* volatile*)(0x382001a4))) |
| | 449 | +#define DMAC0C5NEXTLLI (*((const struct dma_lli* volatile*)(0x382001a8))) |
| | 450 | +#define DMAC0C5CONTROL (*((uint32_t volatile*)(0x382001ac))) |
| | 451 | +#define DMAC0C5CONFIG (*((uint32_t volatile*)(0x382001b0))) |
| | 452 | +#define DMAC0C6LLI (*((struct dma_lli volatile*)(0x382001c0))) |
| | 453 | +#define DMAC0C6SRCADDR (*((const void* volatile*)(0x382001c0))) |
| | 454 | +#define DMAC0C6DESTADDR (*((void* volatile*)(0x382001c4))) |
| | 455 | +#define DMAC0C6NEXTLLI (*((const struct dma_lli* volatile*)(0x382001c8))) |
| | 456 | +#define DMAC0C6CONTROL (*((uint32_t volatile*)(0x382001cc))) |
| | 457 | +#define DMAC0C6CONFIG (*((uint32_t volatile*)(0x382001d0))) |
| | 458 | +#define DMAC0C7LLI (*((struct dma_lli volatile*)(0x382001e0))) |
| | 459 | +#define DMAC0C7SRCADDR (*((const void* volatile*)(0x382001e0))) |
| | 460 | +#define DMAC0C7DESTADDR (*((void* volatile*)(0x382001e4))) |
| | 461 | +#define DMAC0C7NEXTLLI (*((const struct dma_lli* volatile*)(0x382001e8))) |
| | 462 | +#define DMAC0C7CONTROL (*((uint32_t volatile*)(0x382001ec))) |
| | 463 | +#define DMAC0C7CONFIG (*((uint32_t volatile*)(0x382001f0))) |
| | 464 | +#define DMAC1INTSTS (*((uint32_t volatile*)(0x39900000))) |
| | 465 | +#define DMAC1INTTCSTS (*((uint32_t volatile*)(0x39900004))) |
| | 466 | +#define DMAC1INTTCCLR (*((uint32_t volatile*)(0x39900008))) |
| | 467 | +#define DMAC1INTERRSTS (*((uint32_t volatile*)(0x3990000c))) |
| | 468 | +#define DMAC1INTERRCLR (*((uint32_t volatile*)(0x39900010))) |
| | 469 | +#define DMAC1RAWINTTCSTS (*((uint32_t volatile*)(0x39900014))) |
| | 470 | +#define DMAC1RAWINTERRSTS (*((uint32_t volatile*)(0x39900018))) |
| | 471 | +#define DMAC1ENABLEDCHANS (*((uint32_t volatile*)(0x3990001c))) |
| | 472 | +#define DMAC1SOFTBREQ (*((uint32_t volatile*)(0x39900020))) |
| | 473 | +#define DMAC1SOFTSREQ (*((uint32_t volatile*)(0x39900024))) |
| | 474 | +#define DMAC1SOFTLBREQ (*((uint32_t volatile*)(0x39900028))) |
| | 475 | +#define DMAC1SOFTLSREQ (*((uint32_t volatile*)(0x3990002c))) |
| | 476 | +#define DMAC1CONFIG (*((uint32_t volatile*)(0x39900030))) |
| | 477 | +#define DMAC1SYNC (*((uint32_t volatile*)(0x39900034))) |
| | 478 | +#define DMAC1CLLI(c) (*((struct dma_lli volatile*)(0x39900100 + 0x20 * (c)))) |
| | 479 | +#define DMAC1CSRCADDR(c) (*((const void* volatile*)(0x39900100 + 0x20 * (c)))) |
| | 480 | +#define DMAC1CDESTADDR(c) (*((void* volatile*)(0x39900104 + 0x20 * (c)))) |
| | 481 | +#define DMAC1CNEXTLLI(c) (*((const void* volatile*)(0x39900108 + 0x20 * (c)))) |
| | 482 | +#define DMAC1CCONTROL(c) (*((uint32_t volatile*)(0x3990010c + 0x20 * (c)))) |
| | 483 | +#define DMAC1CCONFIG(c) (*((uint32_t volatile*)(0x39900110 + 0x20 * (c)))) |
| | 484 | +#define DMAC1C0LLI (*((struct dma_lli volatile*)(0x39900100))) |
| | 485 | +#define DMAC1C0SRCADDR (*((const void* volatile*)(0x39900100))) |
| | 486 | +#define DMAC1C0DESTADDR (*((void* volatile*)(0x39900104))) |
| | 487 | +#define DMAC1C0NEXTLLI (*((const struct dma_lli* volatile*)(0x39900108))) |
| | 488 | +#define DMAC1C0CONTROL (*((uint32_t volatile*)(0x3990010c))) |
| | 489 | +#define DMAC1C0CONFIG (*((uint32_t volatile*)(0x39900110))) |
| | 490 | +#define DMAC1C1LLI (*((struct dma_lli volatile*)(0x39900120))) |
| | 491 | +#define DMAC1C1SRCADDR (*((const void* volatile*)(0x39900120))) |
| | 492 | +#define DMAC1C1DESTADDR (*((void* volatile*)(0x39900124))) |
| | 493 | +#define DMAC1C1NEXTLLI (*((const struct dma_lli* volatile*)(0x39900128))) |
| | 494 | +#define DMAC1C1CONTROL (*((uint32_t volatile*)(0x3990012c))) |
| | 495 | +#define DMAC1C1CONFIG (*((uint32_t volatile*)(0x39900130))) |
| | 496 | +#define DMAC1C2LLI (*((struct dma_lli volatile*)(0x39900140))) |
| | 497 | +#define DMAC1C2SRCADDR (*((const void* volatile*)(0x39900140))) |
| | 498 | +#define DMAC1C2DESTADDR (*((void* volatile*)(0x39900144))) |
| | 499 | +#define DMAC1C2NEXTLLI (*((const struct dma_lli* volatile*)(0x39900148))) |
| | 500 | +#define DMAC1C2CONTROL (*((uint32_t volatile*)(0x3990014c))) |
| | 501 | +#define DMAC1C2CONFIG (*((uint32_t volatile*)(0x39900150))) |
| | 502 | +#define DMAC1C3LLI (*((struct dma_lli volatile*)(0x39900160))) |
| | 503 | +#define DMAC1C3SRCADDR (*((const void* volatile*)(0x39900160))) |
| | 504 | +#define DMAC1C3DESTADDR (*((void* volatile*)(0x39900164))) |
| | 505 | +#define DMAC1C3NEXTLLI (*((volatile void**)(0x39900168))) |
| | 506 | +#define DMAC1C3CONTROL (*((uint32_t volatile*)(0x3990016c))) |
| | 507 | +#define DMAC1C3CONFIG (*((uint32_t volatile*)(0x39900170))) |
| | 508 | +#define DMAC1C4LLI (*((struct dma_lli volatile*)(0x39900180))) |
| | 509 | +#define DMAC1C4SRCADDR (*((const void* volatile*)(0x39900180))) |
| | 510 | +#define DMAC1C4DESTADDR (*((void* volatile*)(0x39900184))) |
| | 511 | +#define DMAC1C4NEXTLLI (*((const struct dma_lli* volatile*)(0x39900188))) |
| | 512 | +#define DMAC1C4CONTROL (*((uint32_t volatile*)(0x3990018c))) |
| | 513 | +#define DMAC1C4CONFIG (*((uint32_t volatile*)(0x39900190))) |
| | 514 | +#define DMAC1C5LLI (*((struct dma_lli volatile*)(0x399001a0))) |
| | 515 | +#define DMAC1C5SRCADDR (*((const void* volatile*)(0x399001a0))) |
| | 516 | +#define DMAC1C5DESTADDR (*((void* volatile*)(0x399001a4))) |
| | 517 | +#define DMAC1C5NEXTLLI (*((const struct dma_lli* volatile*)(0x399001a8))) |
| | 518 | +#define DMAC1C5CONTROL (*((uint32_t volatile*)(0x399001ac))) |
| | 519 | +#define DMAC1C5CONFIG (*((uint32_t volatile*)(0x399001b0))) |
| | 520 | +#define DMAC1C6LLI (*((struct dma_lli volatile*)(0x399001c0))) |
| | 521 | +#define DMAC1C6SRCADDR (*((const void* volatile*)(0x399001c0))) |
| | 522 | +#define DMAC1C6DESTADDR (*((void* volatile*)(0x399001c4))) |
| | 523 | +#define DMAC1C6NEXTLLI (*((const struct dma_lli* volatile*)(0x399001c8))) |
| | 524 | +#define DMAC1C6CONTROL (*((uint32_t volatile*)(0x399001cc))) |
| | 525 | +#define DMAC1C6CONFIG (*((uint32_t volatile*)(0x399001d0))) |
| | 526 | +#define DMAC1C7LLI (*((struct dma_lli volatile*)(0x399001e0))) |
| | 527 | +#define DMAC1C7SRCADDR (*((const void* volatile*)(0x399001e0))) |
| | 528 | +#define DMAC1C7DESTADDR (*((void* volatile*)(0x399001e4))) |
| | 529 | +#define DMAC1C7NEXTLLI (*((const struct dma_lli* volatile*)(0x399001e8))) |
| | 530 | +#define DMAC1C7CONTROL (*((uint32_t volatile*)(0x399001ec))) |
| | 531 | +#define DMAC1C7CONFIG (*((uint32_t volatile*)(0x399001f0))) |
| | 532 | + |
| | 533 | + |
| | 534 | +/////LCD///// |
| | 535 | +#define LCDCON (*((uint32_t volatile*)(0x38300000))) |
| | 536 | +#define LCDWCMD (*((uint32_t volatile*)(0x38300004))) |
| | 537 | +#define LCDSTATUS (*((uint32_t volatile*)(0x3830001c))) |
| | 538 | +#define LCDPHTIME (*((uint32_t volatile*)(0x38300010))) |
| | 539 | +#define LCDWDATA (*((uint32_t volatile*)(0x38300040))) |
| | 540 | + |
| | 541 | +/////ATA///// |
| | 542 | +#define ATA_CONTROL (*((uint32_t volatile*)(0x38700000))) |
| | 543 | +#define ATA_STATUS (*((uint32_t volatile*)(0x38700004))) |
| | 544 | +#define ATA_COMMAND (*((uint32_t volatile*)(0x38700008))) |
| | 545 | +#define ATA_SWRST (*((uint32_t volatile*)(0x3870000c))) |
| | 546 | +#define ATA_IRQ (*((uint32_t volatile*)(0x38700010))) |
| | 547 | +#define ATA_IRQ_MASK (*((uint32_t volatile*)(0x38700014))) |
| | 548 | +#define ATA_CFG (*((uint32_t volatile*)(0x38700018))) |
| | 549 | +#define ATA_MDMA_TIME (*((uint32_t volatile*)(0x38700028))) |
| | 550 | +#define ATA_PIO_TIME (*((uint32_t volatile*)(0x3870002c))) |
| | 551 | +#define ATA_UDMA_TIME (*((uint32_t volatile*)(0x38700030))) |
| | 552 | +#define ATA_XFR_NUM (*((uint32_t volatile*)(0x38700034))) |
| | 553 | +#define ATA_XFR_CNT (*((uint32_t volatile*)(0x38700038))) |
| | 554 | +#define ATA_TBUF_START (*((void* volatile*)(0x3870003c))) |
| | 555 | +#define ATA_TBUF_SIZE (*((uint32_t volatile*)(0x38700040))) |
| | 556 | +#define ATA_SBUF_START (*((void* volatile*)(0x38700044))) |
| | 557 | +#define ATA_SBUF_SIZE (*((uint32_t volatile*)(0x38700048))) |
| | 558 | +#define ATA_CADR_TBUF (*((void* volatile*)(0x3870004c))) |
| | 559 | +#define ATA_CADR_SBUF (*((void* volatile*)(0x38700050))) |
| | 560 | +#define ATA_PIO_DTR (*((uint32_t volatile*)(0x38700054))) |
| | 561 | +#define ATA_PIO_FED (*((uint32_t volatile*)(0x38700058))) |
| | 562 | +#define ATA_PIO_SCR (*((uint32_t volatile*)(0x3870005c))) |
| | 563 | +#define ATA_PIO_LLR (*((uint32_t volatile*)(0x38700060))) |
| | 564 | +#define ATA_PIO_LMR (*((uint32_t volatile*)(0x38700064))) |
| | 565 | +#define ATA_PIO_LHR (*((uint32_t volatile*)(0x38700068))) |
| | 566 | +#define ATA_PIO_DVR (*((uint32_t volatile*)(0x3870006c))) |
| | 567 | +#define ATA_PIO_CSD (*((uint32_t volatile*)(0x38700070))) |
| | 568 | +#define ATA_PIO_DAD (*((uint32_t volatile*)(0x38700074))) |
| | 569 | +#define ATA_PIO_READY (*((uint32_t volatile*)(0x38700078))) |
| | 570 | +#define ATA_PIO_RDATA (*((uint32_t volatile*)(0x3870007c))) |
| | 571 | +#define ATA_BUS_FIFO_STATUS (*((uint32_t volatile*)(0x38700080))) |
| | 572 | +#define ATA_FIFO_STATUS (*((uint32_t volatile*)(0x38700084))) |
| | 573 | +#define ATA_DMA_ADDR (*((void* volatile*)(0x38700088))) |
| | 574 | + |
| | 575 | + |
| | 576 | +/////CLICKWHEEL///// |
| | 577 | +#define WHEEL00 (*((uint32_t volatile*)(0x3C200000))) |
| | 578 | +#define WHEEL04 (*((uint32_t volatile*)(0x3C200004))) |
| | 579 | +#define WHEEL08 (*((uint32_t volatile*)(0x3C200008))) |
| | 580 | +#define WHEEL0C (*((uint32_t volatile*)(0x3C20000C))) |
| | 581 | +#define WHEEL10 (*((uint32_t volatile*)(0x3C200010))) |
| | 582 | +#define WHEELINT (*((uint32_t volatile*)(0x3C200014))) |
| | 583 | +#define WHEELRX (*((uint32_t volatile*)(0x3C200018))) |
| | 584 | +#define WHEELTX (*((uint32_t volatile*)(0x3C20001C))) |
| | 585 | + |
| | 586 | + |
| | 587 | +/////CLOCK GATES///// |
| | 588 | +#define CLOCKGATE_USB_1 2 |
| | 589 | +#define CLOCKGATE_USB_2 35 |
| | 590 | + |
| | 591 | + |
| | 592 | +/////INTERRUPTS///// |
| | 593 | +#define IRQ_TIMER 8 |
| | 594 | +#define IRQ_USB_FUNC 19 |
| | 595 | +#define IRQ_DMAC(d) 16 + d |
| | 596 | +#define IRQ_DMAC0 16 |
| | 597 | +#define IRQ_DMAC1 17 |
| | 598 | +#define IRQ_WHEEL 23 |
| | 599 | +#define IRQ_ATA 29 |
| | 600 | + |
| | 601 | + |
| | 602 | +#endif |
