| Index: embios/trunk/target/ipodnano2g/nand.c |
| — | — | @@ -375,6 +375,9 @@ |
| 376 | 376 | void* sparebuffer, uint32_t doecc,
|
| 377 | 377 | uint32_t checkempty)
|
| 378 | 378 | {
|
| | 379 | +#ifdef NAND_TRACE
|
| | 380 | + DEBUGF("NAND: Read bank %d, page %d", bank, page);
|
| | 381 | +#endif
|
| 379 | 382 | uint8_t* data = (uint8_t*)databuffer;
|
| 380 | 383 | uint8_t* spare = nand_spare;
|
| 381 | 384 | if (sparebuffer) spare = (uint8_t*)sparebuffer;
|
| — | — | @@ -430,7 +433,26 @@ |
| 431 | 434 | else memcpy(sparebuffer, nand_ctrl, 0xC);
|
| 432 | 435 | }
|
| 433 | 436 | if (checkempty) rc |= nand_check_empty(spare) << 1;
|
| | 437 | +#ifdef NAND_DEBUG
|
| | 438 | + if ((rc & 2) == 0)
|
| | 439 | + {
|
| | 440 | + if ((rc & 0x10) != 0)
|
| | 441 | + DEBUGF("NAND: ECC failed to correct bank %d page %d user data!", bank, page);
|
| | 442 | + if ((rc & 0xE0) != 0)
|
| | 443 | + DEBUGF("NAND: ECC corrected %d errors in bank %d page %d user data!", rc >> 5, bank, page);
|
| | 444 | + if ((rc & 0x100) != 0)
|
| | 445 | + DEBUGF("NAND: ECC failed to correct bank %d page %d control data!", bank, page);
|
| | 446 | + if ((rc & 0xE00) != 0)
|
| | 447 | + DEBUGF("NAND: ECC corrected %d errors in bank %d page %d control data!", (rc >> 9) & 7, bank, page);
|
| | 448 | + }
|
| | 449 | +#ifdef NAND_TRACE
|
| | 450 | + else DEBUGF("NAND: Bank %d page %d: Erased page!", bank, page);
|
| | 451 | +#endif
|
| | 452 | +#endif
|
| 434 | 453 |
|
| | 454 | +#ifdef NAND_TRACE
|
| | 455 | + DEBUGF("NAND: Read success, RC=%X", rc);
|
| | 456 | +#endif
|
| 435 | 457 | return nand_unlock(rc);
|
| 436 | 458 | }
|
| 437 | 459 |
|
| — | — | @@ -438,6 +460,9 @@ |
| 439 | 461 | void* databuffer, void* sparebuffer,
|
| 440 | 462 | uint32_t doecc, uint32_t wait)
|
| 441 | 463 | {
|
| | 464 | +#ifdef NAND_TRACE
|
| | 465 | + DEBUGF("NAND: Write bank %d, page %d", bank, page);
|
| | 466 | +#endif
|
| 442 | 467 | uint8_t* data = (uint8_t*)databuffer;
|
| 443 | 468 | uint8_t* spare = nand_spare;
|
| 444 | 469 | if (sparebuffer) spare = (uint8_t*)sparebuffer;
|
| — | — | @@ -480,6 +505,9 @@ |
| 481 | 506 |
|
| 482 | 507 | uint32_t nand_block_erase(uint32_t bank, uint32_t page)
|
| 483 | 508 | {
|
| | 509 | +#ifdef NAND_TRACE
|
| | 510 | + DEBUGF("NAND: Block erase starting at bank %d, page %d", bank, page);
|
| | 511 | +#endif
|
| 484 | 512 | mutex_lock(&nand_mtx, TIMEOUT_BLOCK);
|
| 485 | 513 | nand_last_activity_value = USEC_TIMER;
|
| 486 | 514 | if (!nand_powered) nand_power_up();
|
| — | — | @@ -498,6 +526,9 @@ |
| 499 | 527 | void* sparebuffer, uint32_t doecc,
|
| 500 | 528 | uint32_t checkempty)
|
| 501 | 529 | {
|
| | 530 | +#ifdef NAND_TRACE
|
| | 531 | + DEBUGF("NAND: Read all banks, page %d", page);
|
| | 532 | +#endif
|
| 502 | 533 | uint32_t i, rc = 0;
|
| 503 | 534 | if (((uint32_t)databuffer & 0xf) || ((uint32_t)sparebuffer & 0xf)
|
| 504 | 535 | || !databuffer || !sparebuffer || !doecc)
|
| — | — | @@ -629,6 +660,9 @@ |
| 630 | 661 | uint32_t nand_write_page_start(uint32_t bank, uint32_t page, void* databuffer,
|
| 631 | 662 | void* sparebuffer, uint32_t doecc)
|
| 632 | 663 | {
|
| | 664 | +#ifdef NAND_TRACE
|
| | 665 | + DEBUGF("NAND: Write all banks, page %d", page);
|
| | 666 | +#endif
|
| 633 | 667 | if (((uint32_t)databuffer & 0xf) || ((uint32_t)sparebuffer & 0xf)
|
| 634 | 668 | || !databuffer || !sparebuffer || !doecc || !nand_interleaved)
|
| 635 | 669 | return nand_write_page_int(bank, page, databuffer, sparebuffer, doecc, !nand_interleaved);
|
