Difference between revisions of "Nano2G clock gates"

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===PWRCON===
 
===PWRCON===
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! Bit !! State !! Meaning
 
! Bit !! State !! Meaning
 
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===PWRCONEXT===
 
===PWRCONEXT===
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{| class="wikitable"
 
! Bit !! State !! Meaning
 
! Bit !! State !! Meaning
 
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Revision as of 17:08, 5 August 2010

(State: When taking over from norboot, IIRC, needs verification. Beware: 1 = Masked, 0 = Running!)

PWRCON

Bit State Meaning
31 0 Probably a padding bit
30 0 Probably a padding bit
29 0 Probably a padding bit
28 0 Probably a padding bit
27 0 Probably a padding bit
26 0 Probably a padding bit
25 0 Probably a padding bit
24 0 Probably a padding bit
23 0 Probably a padding bit
22 0 RTC? (Datasheet)
21 0 SDRAM? (Datasheet)
20 0 ECC (Datasheet mismatch, proven to be ECC)
19 1 ATA? (Datasheet)
18 1 LCD? (Datasheet)
17 1 DSP? (Datasheet)
16 0 USBHOST? (Datasheet)
15 0 USBFUNC? (Datasheet)
14 1 USB PHY
13 1 RTC? (Datasheet)
12 1 CHIPID? (Datasheet)
11 0 GPIO? (Datasheet)
10 0 ADC? (Datasheet)
09 1 SPI? (Datasheet)
08 1 UART? (Datasheet)
07 1 SPDIF? (Datasheet)
06 0 I2S (Datasheet, verified)
05 0 I2C (Datasheet, verified)
04 0 TIMER (Datasheet, verified)
03 0 MEMSTICK? (Datasheet)
02 0 SDC/MMC? (Datasheet)
01 0 FMC? (Datasheet)
00 0 LCDC? (Datasheet)


PWRCONEXT

Bit State Meaning
31 0 Probably a padding bit
30 0 Probably a padding bit
29 0 Probably a padding bit
28 0 Probably a padding bit
27 0 Probably a padding bit
26 0 Probably a padding bit
25 0 Probably a padding bit
24 0 Probably a padding bit
23 0 Probably a padding bit
22 0 Probably a padding bit
21 0 Probably a padding bit
20 0 Probably a padding bit
19 0 Probably a padding bit
18 0 Probably a padding bit
17 0 Probably a padding bit
16 0 Probably a padding bit
15 0 Probably a padding bit
14 0 Probably a padding bit
13 1 Unknown
12 0 Unknown, but needs to be powered on
11 1 USB OTG
10 1 AES unit
09 1 Unknown
08 1 Unknown
07 0 LCD SPI I/F
06 0 NAND/FMC
05 1 Unknown
04 1 Unknown
03 1 Unknown
02 1 Hashing unit
01 1 Unknown
00 0 Clickwheel?