S5L8702 - Revision history

Iscle: /* USB */

2023-09-11T23:09:19Z

USB

← Older revision		Revision as of 23:09, 11 September 2023
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	=== USB ===		=== USB ===
	OTG base address: 0x38400000		OTG base address: 0x38400000<br>
	PHY base address: 0x3c400000		PHY base address: 0x3c400000

Iscle: /* JPEG Decoder */

2023-09-11T23:09:10Z

JPEG Decoder

@@ Line 173: / Line 173: @@
 ! Note
 |}
 === JPEG Decoder ===
-Base address: 0x3d100000
+Base address: 0x39600000

Iscle at 23:01, 11 September 2023

2023-09-11T23:01:28Z

← Older revision		Revision as of 23:01, 11 September 2023
Line 173:		Line 173:
	! Note		! Note
	\|}		\|}

			=== JPEG Decoder ===
			Base address: 0x3d100000

Iscle: /* SPISETUP */

2023-09-11T21:56:35Z

SPISETUP

← Older revision		Revision as of 21:56, 11 September 2023
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	\| R?/W		\| R?/W
	\|		\|
	\| ~~Set to~~ 1 ~~for~~ RX~~, 0 for TX~~		\| 0 = TX<br>1 = RX
	\|}		\|}

Iscle at 21:54, 11 September 2023

2023-09-11T21:54:23Z

← Older revision		Revision as of 21:54, 11 September 2023
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	== Introduction ==		== Introduction ==
	This page provides details on the Samsung S5L8702 System on Chip (SoC).		This page provides details on the Samsung S5L8702 System on Chip (SoC).<br>
			'''NOTE:''' All information provided here has been obtained by reverse engineering and is not guaranteed to be accurate.

	== Peripherals ==		== Peripherals ==

Iscle at 21:53, 11 September 2023

2023-09-11T21:53:24Z

← Older revision		Revision as of 21:53, 11 September 2023
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	! Note		! Note
	\|-		\|-
	\| ~~Unk2~~		\| RW
	~~\| 1~~
	~~\| R/W?~~
	\|
	~~\| Gets checked by the bootloader after clearing/setting ''Unk1''~~
	\|-
	~~\| Unk1~~
	\| 0		\| 0
	\| R?/W		\| R?/W
	\|		\|
	\| ~~Gets cleared/set by the bootloader~~		\| Set to 1 for RX, 0 for TX
	\|}		\|}

Iscle at 21:51, 11 September 2023

2023-09-11T21:51:19Z

@@ Line 84: / Line 84: @@
+|
 | Gets cleared/set by the bootloader
 |}

Iscle at 21:45, 11 September 2023

2023-09-11T21:45:16Z

← Older revision		Revision as of 21:45, 11 September 2023
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	! Type		! Type
	! Description		! Description
	\| Note		! Note
	\|-		\|-
	\| Unk2		\| Unk2

Iscle: Created page with "== Introduction == This page provides details on the Samsung S5L8702 System on Chip (SoC). == Peripherals == An overview of the peripherals of the SoC, describing the base ad..."

2023-09-11T21:44:55Z

Created page with "== Introduction == This page provides details on the Samsung S5L8702 System on Chip (SoC). == Peripherals == An overview of the peripherals of the SoC, describing the base ad..."

New page

== Introduction ==
This page provides details on the Samsung S5L8702 System on Chip (SoC).

== Peripherals ==
An overview of the peripherals of the SoC, describing the base address and registers for each one.

=== SPI ===
{| class="wikitable"
|-
! SPI !! Base address
|-
| SPI0 || 0x3c300000
|-
| SPI1 || 0x3ce00000
|-
| SPI2 || 0x3d200000
|}

==== Registers ====
{| class="wikitable"
! Register Name
! Offset
! Description
! Note
|-
| SPICTRL
| 0x00
|
|
|-
| SPISETUP
| 0x04
|
|
|-
| SPISTATUS
| 0x08
|
|
|-
| SPIPIN
| 0x0c
|
|
|-
| SPITXDATA
| 0x10
|
|
|-
| SPIRXDATA
| 0x20
|
|
|-
| SPICLKDIV
| 0x30
|
|
|-
| SPIRXLIMIT
| 0x34
|
|
|}

==== SPICTRL ====
{| class="wikitable"
! Name
! Bit
! Type
! Description
| Note
|-
| Unk2
| 1
| R/W?
|
| Gets checked by the bootloader after clearing/setting ''Unk1''
|-
| Unk1
| 0
| R?/W
|
| Gets cleared/set by the bootloader
|}